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參數(shù)資料
| 型號： | SN54ABT823W |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 9位總線接口倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 109K |
| 代理商： | SN54ABT823W |
SN54ABT823, SN74ABT823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS158E – JANUARY 1991 – REVISED MAY 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
VCC = 5 V,
TA = 25
°
C
MIN
SN54ABT823
SN74ABT823
UNIT
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
0
125
0
125
0
125
MHz
CLR low
5.5
5.5
5.5
tw
Pulse duration
CLK high
2.9
2.9
2.9
ns
CLK low
3.8
3.8
3.8
CLR inactive
2.5
2.5
2.5
tsu
Setup time before CLK
↑
Data
2.1
2.1
2.1
ns
CLKEN high
2
2
2
CLKEN low
3.3
3.3
3.3
Data
CLKEN high
1.3
1.3
1.3
th
Hold time after CLK
↑
1
1
1
ns
CLKEN low
2
2
2
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25
°
C
MIN
SN54ABT823
SN74ABT823
UNIT
TYP
MAX
MIN
MAX
MIN
MAX
fmax
tPLH
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
125
200
125
125
MHz
CLK
Q
2.1
4.3
5.9
2.1
8.1
2.1
6.8
ns
2.2
4.4
6.1
2.2
7
2.2
6.7
CLR
Q
2
4.1
6.3
4.7
2
7.3
2
7.1
6
6.5
7.5
ns
OE
Q
1
3
1
6.3
1
ns
2.2
4.1
5.6
6.5
2.2
6.6
2.2
OE
Q
2.7
4.8
2.7
7.7
2.7
ns
1.9
5
6.4
1.9
7.4
1.9
6.9
This data sheet limit may vary among suppliers.
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