參數(shù)資料
型號(hào): SMT4004F
廠商: Electronic Theatre Controls, Inc.
元件分類(lèi): 基準(zhǔn)電壓源/電流源
英文描述: Distributed Power Hot-Swap Controller
中文描述: 分布式電源熱插拔控制器
文件頁(yè)數(shù): 7/23頁(yè)
文件大?。?/td> 480K
代理商: SMT4004F
7
2049 2.2 9/13/00
SMT4004
SUMMIT MICROELECTRONICS, Inc.
CBFAULT
CBFAULT is driven active whenever an
over-current condition is detected. It is a programmable
output that can be either an active high or active low
(factory default) output.
RESETS
RST1# to RST4#
Associated with each manager is a
reset output. They are active-low open-drain outputs that
can be wire-ORed with other open-drain signals. The user
can select UV1, UV2 and/or an over-current condition as
the trigger for the reset pulse by programming Registers
R11
and
R12
(the default condition from the factory is all
conditions generate a reset). The reset pulse width is
adjustable by writing to Register
R1C
(default condition
from the factory is pulse of 200ms).
MR#
When driven low the manual reset input will
automatically drive all four reset outputs low.
INTERRUPTS
IRQ#
the IRQ output is an active low open-drain output
that is driven low whenever one or more of its programmed
triggers is active. There are twenty programmable
sources for generating the interrupt: bus-side over- and
under-voltage, card-side under-voltage 1 and 2, and an
over-current condition. Each source is individually en-
abled by writing to Registers
R13, R14
and
R15
. The
default from the factory is to enable all sources. The IRQ#
output can only be cleared by bringing
IRQ_CLR#
low, or
after a power-down/power-up sequence.
TRKR_IRQ#
the
TRAKKER
interrupt indicates there
was a skew of greater than 300mV during the power on
cycle. The source of the TRKR_IRQ# is programmable
and can be initiated by any one of the managers. The
configuration Registers
R11
and
R12
select the source of
interrupt. Configuration Register
R10
enables the
TRKR_IRQ# output (or one of three other options). The
default from the factory is to enable all sources. The
TRKR_IRQ# output can only be cleared by bringing
IRQ_CLR high or after a power-down/power-up se-
quence.
In order to avoid false interrupts during a power-on se-
quence there is a programmable
power-on interrupt hold-
off
register. The delay can be programmed from 200ms
to 1600ms. The interrupt hold-off is in Register
R15
and
its default value from the factory will be 1600ms.
FAULT REGISTER
Whenever an interrupt is generated the cause of the fault
will be recorded in the nonvolatile status Register. In order
to avoid false recordings during power-down situations,
no faults will be recorded if the PWR_ON input has been
deactivated. The fault Registers are located at
R1D
through
R1F
. The fault source is indicated by a
1
in the
assigned bit location. Overwriting the fault Register with
0
s
is the only way to clear a recorded fault condition.
CROWBAR
The CROWBAR output is another form of
status output. The conditions to generate a crowbar
output are programmable in Register
R19
. Whenever one
of the conditions occurs the CROWBAR output will strobe.
Rapid shutdown of the card-side supplies may be required
to prevent damage to the DSP
s or microprocessors.
SCRs with a fast turn-on time make excellent crowbar
devices and only need a pulse of gate current to
trigger.
MEMORY AND REGISTER ACCESS
A0, A1 & A2
The address pins are biased either to the
highest VI pin or GND, and provide a mechanism for
assigning a unique address to the SMH4004.
SDA
SDA is a bidirectional serial data pin. It is
configured as an open drain output and will require a pull-
up to the highest VI pin.
SCL
SCL is the serial clock input.
MISCELLANEOUS MANAGER SIGNALS
1.25V
REF
This pin is a 1.25V Reference output that can
be used in conjunction with external circuitry.
UV_OVERRIDE
The Under-Voltage Override input will
disable the under-voltage comparators. This can be used
for board test and also during system margining.
FORCE_SD
When asserted the Force Shut Down input
will immediately clamp the VGATE outputs to ground. This
can be used in conjunction with the
CROWBAR
. The
active level for
FORCE_SD
is programmable and acces-
sible in Register
R1B
.
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