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4
SMT4004
2049 2.2 9/13/00
SUMMIT MICROELECTRONICS, Inc.
PIN DESCRIPTIONS AND DEVICE OPERATION
THE TRAKKERSUPPLY VOLTAGES
The
VI
inputs of all four supply managers are diode ORed
and tied to the device's internal V
DD
node. The
TRAKKER
will use the highest VI input for its supply voltage. At least
one VI input must be at or above 2.7V for proper device
operation.
V
DD
_CAP
—
Charge storage connection for the chip's
internal power suply. For most applications a 10μF
capacitor should be connected to his pin.
V
GG
_CAP
—
This pin should be tied to a capacitor to be
charged by the charge pump. The capacitor should be of
sufficient size so as to provide current to the VGATE
outputs under varying load conditions.
PGND
—
Power ground
DGND
—
Digital Ground
AGND
—
Analog Ground
TIMERS
LDO#
—
The longdog timer output is an active-low open-
drain output that can be wire-ORed with other open-drain
signals. The longdog timer is generally programmed to
generate an output at a time interval longer than the
watchdog timer. The time interval is programmed in
Register
R1C
.
WDO#
—
The watchdog timer output is an active-low
open-drain output that can be wire-ORed with other open-
drain signals. The watchdog timer is generally pro-
grammed to generate an output at a time interval shorter
than the longdog timer. The time interval is programmed
in Register
R1C
.
WLDI
—
Watchdog and longdog timer reset input. A low-
to-high transition on this pin will reset both the watchdog
timer and the longdog timer.
The watchdog and longdog work in tandem: resetting one
resets the other. Generally, the longdog will be pro-
grammed to time out sometime after the watchdog. As an
example, the WDO# output could be used to generate a
warning interrupt and the LDO# output could be tied to a
system reset line.
Both timers can be turned off, facilitating system debug
and also allowing operating systems to
‘
boot up
’
and
configure themselves without interrupts or resets.
SUPPLY MANAGERS
The electrical placement of the SMT4004 on a printed
circuit card is such that it separates the host power supply
and any on-board DC-to-DC converters (or LDOs) from
the backend circuitry such as multiple DSPs, micropro-
cessors and associated glue logic. The host supplies, and
any other regulated voltages that will be
“
switched
”
by the
device, are referred to as bus-side voltages. The voltages
that are on the backend circuitry side of the switches are
referred to as card-side voltages.
The four supply manager blocks are identical. Each
contains three primary functional blocks: the first monitors
the bus-side voltages, the second monitors the card-side
voltages, and the third monitors over-current conditions
for that particular supply.
BUS-SIDE MANAGEMENT
Figure 1 illustrates the functional blocks of the four supply
managers. Each manager block can be independently
enabled or electrically removed from the device.
The VI input monitors the bus-side voltage for both under-
voltage and over-voltage conditions. The thresholds for
the under-voltage detection for VI inputs are programmed
in Registers
R00
through
R03
. The VI input is effectively
the V
REF
of a nonvolatile DAC. The DAC has been
designed so that the threshold can be determined by
multiplying the binary value of the Register times 20mV
and adding that to 0.9V in the formula P
VIT
= 0.9V + (0.2mV
×
n), where nis the register value (0 - 255 decimal). This
allows very precise monitoring of voltages in the range of
0.9V to 6V without the use of external resistor divider
networks.
The over-voltage section works in a similar manner, with
the formula being Offset = (P
VIT
×
1.2) + [(0.04
×
P
VIT
)
×
n,
where nis the register value in
R04
through
R07
. All
enabled manager blocks must ensure their respective VI
inputs are within the programmed limits before the VGATE
outputs can be turned on and the
TRAKKER
logic en-
abled. The VI comparator outputs can also be used to
generate a general interrupt.
It should be noted that either one or both of the bus-side
monitors could be disabled via Registers
R04
through
R07
.