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SLE 66C680PE
Preliminary - Short Product Information
7 / 9
02.04
General Description
The SLE66C680PE is another member of the improved 66PE-series of Infineon Technologies. This high
performance security crypto controller is manufactured in advanced 0.22 μm CMOS technology. It is
downward compatible to existing 66P controller derivatives. The well known ECO2000 8/16 bit CPU provides
the high efficiency of the SAB 8051 instruction set extended by additional powerful instructions together with
enhanced performance, memory sizes and security features compared to existing 66P derivatives.
Performance:
The internal clock frequency can be adjusted to a level up to 33 MHz either as a multiple of
1,2,3,4 to the external frequency or independent of the clock rate of the terminal with the help of the internal
clock. It is adjustable according to either available power requirements or required performance:
Increased internal clock frequency for maximum performance, e.g. for high performance with max.
frequency in payment applications or crypto operations.
Automatically adjusted frequency for a max. given power consumption, e.g. by GSM or UMTS
requirements.
Memory:
The SLE66C680PE offers 244 Kbytes of User-ROM, 256 byte internal RAM, 6144 byte XRAM and
68 Kbytes MicroSlim-EEPROM, to fulfill the increased requirements of GSM and UMTS applications. The
large ROM size allows to place applications in the ROM-mask and to keep the E2PROM free for customer
data. In addition it saves mask development costs, as one mask may be used for different customer projects.
68 Kbyte of EEPROM thus allows to include SIM Application Toolkit, Wireless Application Protocol (WAP),
WML-Browser and JavaCard API implementations into the NVM.
The enhanced Memory Management and Protection Unit allows a secure separation of the operating system
and different applications. It allows to separate the memories in application orientated segments, which can
be controlled by the OS. Furthermore, the MMU makes a secure downloading of applications possible even
after personalization of a card. These new features suit the requirements of the next generation of multi
application operating systems.
DES
Accelerator
EEPROM
68 Kbyte
XRAM
6 Kbyte
ROM
244 Kbyte
16-Bit CPU with
MMU
&
ECO 2000
Instruction Set
Voltage
Clock
Reset
Sleep Mode Logic
Sensors/Filters
Voltage Regulator
Address-/Data Bus
two
16-bit
Timer
Interrupt
CRC
Random
Number
Generator
UART
Clock
generated
Figure 2: Block Diagram SLE 66C680PE
The new platform is designed to address up to 16 Mbyte. However this feature is only available upon request
and will clearly require a change in the existing tool environment.
In addition, new instructions have been implemented in the design for an efficient direct access of physical
memory >64Kbyte up to 16 Mbyte.
New