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參數(shù)資料
| 型號(hào)： | SL1935KG |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Single Chip Synthesized Zero IF Tuner |
| 中文描述： | 單芯片合成零中頻調(diào)諧器 |
| 文件頁數(shù)： | 14/23頁 |
| 文件大?。?/td> | 415K |
| 代理商： | SL1935KG |
14
SL1935
Characteristic
Pin
Value
Min
Max
Typ
Units
Conditions
Leakage current
Hysterysis
SDA output voltage
SCL clock rate
Charge pump output current
Charge pump output leakage
Charge pump drive output current
Crystal frequency
Recommended crystal series
resistance
External reference input frequency
External reference drive level
Phase detector comparison
frequency
Equivalent phase noise at phase
detector
Local oscillator programmable
divider division ratio
Reference division ratio
Output port P0
Sink current
Leakage current
BUFREF output
Output amplitude
Output impedance
Address select
Input high curent
Input low current
3
4
36
36
35
1,2
2
2
34
5
18
0.5
2
10
2
0.2
240
2
10
0.4
0.6
400
+-10
20
200
20
0.5
4
32767
10
1
-0.5
μ
A
V
V
V
kHz
nA
mA
MHz
MHz
Vpp
MHz
dBc/Hz
mA
μ
A
Vpp
mA
mA
Vcc = Vee = 0V
Isink = 3mA
Isink = 6mA
Vpin36 = 2V. (Table 5)
Vpin36 = 2V
Vpin35 = 0.7V
(Fig.15 for application)
4MHz parallel resonant crystal
Sinewave coupled via 10nF blocking
capacitor
Sinewave coupled via 10nF blocking
capacitor
SSB within loop bandwidth, all
comparison frequencies
(Table 3)
(Note 7)
Vport = 0.7
Vport = Vcc
AC coupled. (Note 10.)
Enabled by bit RE = 1 and default
state on power-up.
(Table 9c)
Vin = Vcc
Vin = Vee
Table 10.
Electrical Characteristics
(Continued)
0.4
+-3
-152
0.35
250
Notes to Table 10
All power levels are referred to 75
, and 0dBm = 109dB
μ
V.
System specifications refer to total cascaded system of converter/AGC stage and baseband amplifier stagewith nominal
6dB pad as interstage filter and load impedance as detailed in Figure 14.
Baseband dominated IP2. AGC set for 20dB system gain with two tones for intermodulation test at fc+146and
fc+155MHz at 100dB
μ
V generating output intermodulation spur at 9MHz. 30MHz 3dB bandwidthinterstage filter included.
LNA dominated IP2. AGC set for 20dB system gain with two tones for intermodulation test at fc+146 and2*fc+155 MHz at
100dB
μ
V generating output intermodulation spur at 9MHz. 30MHz 3dB bandwidthinterstage filter included.
AGC set for 20dB system gain with two tones for intermodulation test at fc+110 and fc+211MHz at 100dB
μ
Vgenerating
output intermodulation spur at 9MHz. 30MHz 3dB bandwidth interstage filter included.
Dynamic range assuming termination as detailed in Figure 14, and including 6 dB interstage filter insertion loss,
delivering 700mVp-p at baseband outputs (pins 17,20). AGC monotonic from Vee to Vcc (Fig.4).
Port powers up in high impedance state.
The level of 2.01GHz downconverted to baseband relative to 1.01GHz with the oscillator tuned to 1GHz,measured with
no input pre-filtering.
The level of second harmonic of 1.01GHz input at
–
25dBm downconverted to baseband relative to 2.01GHz at
–
40 dBm
with the oscillator tuned to 2GHz, measured with no input pre-filtering.
If the BUFREF output is not used it should be left open circuit or connected to Vccd, and disabled by settingRE =
‘
0
’
.
This parameter is very application dependant. With good RF isolation <-60dBm can be achieved.
11.
SYNTHESISER
SDA,SCL
Input high voltage
Input low voltage
Input high current
Input low current
3,4
3
0
-10
5.5
1.5
10
V
V
μ
A
μ
A
I
2
C 'fast mode' compliant
Input voltage = Vcc
Input voltage = Vee
0.25
0.45
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| SL1935NP1Q | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Single Chip Synthesized Zero IF Tuner |
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