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參數(shù)資料
| 型號(hào)： | SL1935 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Single Chip Synthesized Zero IF Tuner |
| 中文描述： | 單芯片合成零中頻調(diào)諧器 |
| 文件頁(yè)數(shù)： | 5/23頁(yè) |
| 文件大?。?/td> | 415K |
| 代理商： | SL1935 |
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5
SL1935
The STOP condition can be generated after any data
byte, if however it occurs during a byte transmission, the
previous byte data is retained. To facilitate smooth fine
tuning, the frequency data bytes are only accepted by
the device after all 15 bits of frequency data have been
received, or after the generation of a STOP condition.
Read mode
When the device is in read mode, the status byte read
from the device takes the form shown in Table 9b.
Synthesiser programmable divider
Reference programmable divider
Baseband filter path select
Local oscillator select
Charge pump current
Test mode
General purpose port, P0
Buffered crystal reference output,
BUFREF
Programmable features
Function as described above
Function as described above.
Function as described above.
Function as described above.
The charge pump current can be programmed by bits C1 & C0 (Table 5).
The test modes are defined by bits T2 - T0 as described in Table 4.
The general purpose port can be programmed by bit P0;
Logic
‘
1
’
= on
Logic
‘
0
’
= off (high impedance)
The buffered crystal reference frequency can be switched to the BUFREF
output by bit RE as described in Table 7. The BUFREF output defaults to
the
‘
ON
’
condition at device power up.
Bit 1 (POR) is the power-on reset indicator, and this is set
to a logic
‘
1
’
if the Vccd supply to the device has dropped
below 3V (at 25oC), .g. when the device is initially turned
ON. The POR is reset to
‘
0
’
when the read sequence is
terminated by a STOP command. When POR is set high
this indicates that the programmed information may
have been corrupted and the device reset to the power
up condition.
Bit 2 (FL) indicates whether the synthesiser is phase
locked, a logic
‘
1
’
is present if the device is locked, and
a logic
‘
0
’
if the device is unlocked.
The typical key performance data at Vcc = 5V and +25oC ambient re detailed in Table .
Function
Table 2. Programmable Features
R2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
R4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
R1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
R0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Ratio
2
4
8
16
32
64
128
256
Illegal state
5
10
20
40
80
160
320
Illegal state
6
12
24
48
96
192
384
Illegal state
7
14
28
56
112
224
448
Table 3. Reference division ratios
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SL1935D | Single Chip Synthesized Zero IF Tuner |
| SL1935KG | Single Chip Synthesized Zero IF Tuner |
| SL1935NP1Q | Single Chip Synthesized Zero IF Tuner |
| SL2009 | Dual stage IF amplifier for cable tuners |
| SL2009KG | Dual stage IF amplifier for cable tuners |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL1935D | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Single Chip Synthesized Zero IF Tuner |
| SL1935D/KG/NP1P | 制造商:Microsemi Corporation 功能描述: |
| SL1935KG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Single Chip Synthesized Zero IF Tuner |
| SL1935NP1Q | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Single Chip Synthesized Zero IF Tuner |
| SL1A | 制造商:DIOTEC 制造商全稱:Diotec Semiconductor 功能描述:Surface Mount Silicon Rectifier Diodes |
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