參數(shù)資料
型號(hào): SI5318
廠商: Electronic Theatre Controls, Inc.
英文描述: SONET/SDH PRECISION CLOCK MULTIPLIER IC
中文描述: SONET / SDH的精密時(shí)鐘倍頻集成電路
文件頁(yè)數(shù): 25/30頁(yè)
文件大?。?/td> 593K
代理商: SI5318
Si5318
Rev. 1.0
25
A4–8, B5, B8
RSVD_NC
LVTTL
Reserved—No Connect.
This pin must be left unconnected for normal
operation.
C2, D3–D5,
E3–E5
V
DD33
V
DD
Supply
3.3 V Supply.
3.3 V power is applied to the V
DD33
pins. Typical
supply bypassing/decoupling for this configuration is
indicated in the typical application diagram for 3.3 V
supply operation.
D6, D7, E6,
E7, F3–F7
V
DD25
V
DD
Supply
2.5 V Supply.
These pins provide a means of connecting the
compensation network for the on-chip regulator.
C3–C7, E2,
F2, G2–G8
GND
GND
Supply
Ground.
Must be connected to system ground. Minimize the
ground path impedance for optimal performance of
the device.
H2
REXT
I
Analog
External Biasing Resistor.
Used by on-chip circuitry to establish bias currents
within the device. This pin must be connected to
GND through a 10 k
(1%) resistor.
D2
DBLBW
I*
LVTTL
Double Bandwidth
Active high input to boost the selected bandwidth 2x.
When this pin is high, the loop filter bandwidth
selected on BWSEL[1:0] is doubled. When this pin is
high, FXDDELAY must also be high.
Table 10. Si5318 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
*Note:
The LVTLL inputs on the Si5318 device have an internal pulldown mechanism that causes these inputs to default to a
logic low state if the input is not driven from an external source.
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