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參數(shù)資料
| 型號(hào)： | SI5013 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER |
| 中文描述： | 的OC - 12 / 3接口，STM - 4 / 1的SONET / SDH的CDR集成電路限幅放大器 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 153K |
| 代理商： | SI5013 |
Si5013
Rev. 1.4
9
Table 4. AC Characteristics (PLL Characteristics)
(V
DD
= 3.3 V ±5%, T
A
= –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Jitter Tolerance
(OC-12 Mode)
*
J
TOL(PP)
f = 30 Hz
f = 300 Hz
f = 25 kHz
f = 250 kHz
f = 30 Hz
f = 300 Hz
f = 6.5 kHz
f = 65 kHz
60
6
4
0.4
60
6
4
0.4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2.3
20
—
—
0.03
1.5
—
—
—
—
—
—
—
—
4.0
45
500
130
0.1
2
UI
PP
UI
PP
UI
PP
UI
PP
UI
PP
UI
PP
UI
PP
UI
PP
mUI
mUI
kHz
kHz
dB
ms
Jitter Tolerance
(OC-3 Mode)
*
J
TOL(PP)
RMS Jitter Generation
*
Peak-to-Peak Jitter Generation
*
Jitter Transfer Bandwidth
*
J
GEN(rms)
J
GEN(PP)
J
BW
with no jitter on serial data
with no jitter on serial data
OC-12 Mode
OC-3 Mode
Jitter Transfer Peaking
*
Acquisition Time—OC-12
(Reference clock applied)
J
P
T
AQ
After falling edge of
PWRDN/CAL
From the return of valid
data
After falling edge of
PWRDN/CAL
From the return of valid
data
See "4.4.Operation With-
out an External Refer-
ence" on page 12.
—
60
—
μs
Acquisition Time—OC-12
(Reference-less operation)
T
AQ
—
4.0
12
ms
—
13
—
ms
Reference Clock Range
155.5
77.76
19.44
—
MHz
Input Reference Clock Frequency
Tolerance
Frequency Difference at which
Receive PLL goes out of Lock
(REFCLK compared to the divided
down VCO clock)
*Note:
As defined in Bellcore specifications: GR-253-CORE, Issue 3, September 2000. Using PRBS 2
23
– 1 data pattern.
C
TOL
–500
500
ppm
—
±650
—
ppm
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