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Rev. 3.0, 04/02, page xi of xxxviii
Section 12 Timer Unit (TMU)
..................................................................................... 287
12.1
Overview..................................................................................................................... 287
12.1.1 Features........................................................................................................... 287
12.1.2 Block Diagram................................................................................................ 288
12.1.3 Pin Configuration............................................................................................ 288
12.1.4 Register Configuration..................................................................................... 289
12.2
Register Descriptions................................................................................................... 290
12.2.1 Timer Output Control Register (TOCR)........................................................... 290
12.2.2 Timer Start Register (TSTR)............................................................................ 291
12.2.3 Timer Start Register 2 (TSTR2)....................................................................... 292
12.2.4 Timer Constant Registers (TCOR)................................................................... 293
12.2.5 Timer Counters (TCNT).................................................................................. 293
12.2.6 Timer Control Registers (TCR)........................................................................ 294
12.2.7 Input Capture Register (TCPR2)...................................................................... 297
12.3 Operation..................................................................................................................... 298
12.3.1 Counter Operation........................................................................................... 298
12.3.2 Input Capture Function.................................................................................... 301
12.4
Interrupts..................................................................................................................... 302
12.5
Usage Notes................................................................................................................. 303
12.5.1 Register Writes................................................................................................ 303
12.5.2 TCNT Register Reads...................................................................................... 303
12.5.3 Resetting the RTC Frequency Divider.............................................................. 303
12.5.4 External Clock Frequency................................................................................ 303
Section 13 Bus State Controller (BSC)
...................................................................... 305
13.1
Overview..................................................................................................................... 305
13.1.1 Features........................................................................................................... 305
13.1.2 Block Diagram................................................................................................ 307
13.1.3 Pin Configuration............................................................................................ 308
13.1.4 Register Configuration..................................................................................... 310
13.1.5 Overview of Areas........................................................................................... 311
13.1.6 PCMCIA Support............................................................................................ 314
13.2
Register Descriptions................................................................................................... 318
13.2.1 Bus Control Register 1 (BCR1)........................................................................ 318
13.2.2 Bus Control Register 2 (BCR2)........................................................................ 326
13.2.3 Bus Control Register 3 (BCR3) (SH7751R Only)............................................. 327
13.2.4 Bus Control Register 4 (BCR4) (SH7751R Only)............................................. 329
13.2.5 Wait Control Register 1 (WCR1)..................................................................... 331
13.2.6 Wait Control Register 2 (WCR2)..................................................................... 334
13.2.7 Wait Control Register 3 (WCR3)..................................................................... 342
13.2.8 Memory Control Register (MCR) .................................................................... 344
13.2.9 PCMCIA Control Register (PCR).................................................................... 350
13.2.10 Synchronous DRAM Mode Register (SDMR).................................................. 352