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Rev. 2.0, 09/02, page 717 of 732
Item
Page
Revisions (See Manual for Details)
Descriptions added.
Item
Channel 0
Channel 1
Channel 2
Channel 3
Channel 4
PWM mode 2
Ο
Ο
Ο
—
—
Complementary
PWM mode
—
—
—
Ο
Ο
Reset PMW
mode
—
—
—
Ο
AC
synchronous
motor drive
mode
Ο
—
—
Ο
Ο
Phase counting
mode
—
Ο
Ο
—
—
Table 11.1 MTU
Functions
192
Table 11.10 TIORH_0
(channel 0) to Table
11.25 TIORL_4
(Channel 4)
205 to
220
Pin description amended.
Output prohibited
→
Output retained
Description added.
Legend:
X: Don’t care
Note:
*
After power-on reset, 0 is output until TIOR is set.
Table 11.27 Output
Level Select Function
231
Bit No. amended.
Bit 1
→
Bit 0
Figure amended.
Figure 11.30
Procedure for Selecting
the Reset-
Synchronized PWM
Mode
259
Enable waveform output
Start count operation
Reset-synchronized PWM mode
[8]
[10]
Note: The output waveform starts to toggle operation at the point of
TCNT_3 = TGRA_3 = X by setting X = TGRA, i.e., cycle = duty.
[9]
PFC setting
[7] Set bits MD3-MD0 in TMDR_3 to B'1000 to select
the reset-synchronized PWM mode. Do not set to TMDR_4.
[8] Set the enabling/disabling of the PWM waveform output
pin in TOER.
[9] Set the port control register and the port I/O register.
[10] Set the CST3 bit in the TSTR to 1 to start the count
operation.
Figure 11.33 Example
of Complementary
PWM Mode Setting
Procedure
264
Figure amended.
Enable waveform output
Start count operation
<Complementary PWM mode>
[9] Select complementary PWM mode in timer mode register 3
(TMDR_3). Do not set in TMDR_4.
[10] Set enabling/disabling of PWM waveform output pin output in
the timer output master enable register (TOER).
[11] Set the port control register and the port I/O register.
[12] Set bits CST3 and CST4 in TSTR to 1 simultaneously to start
the count operation.
[10]
PFC setting
[11]
[12]