參數(shù)資料
型號(hào)： SDA5254
廠商： SIEMENS A G
元件分類： 圖文
英文描述： 8-BIT SINGLE CHIP MICROCONTROLLERS
中文描述： TELETEXT AND VPS/PDC DECODER, PDIP52
文件頁數(shù)： 92/143頁
文件大?。?/td> 1050K
代理商： SDA5254
SDA 525x
Semiconductor Group
92
1998-04-08
Serial Port Control Register SCON
Serial Port Control Register
Default after reset: 00
H
(MSB)
SM0
SM1
SCON
SFR-Address 98
H
(LSB)
RI
SM2
REN
TB8
RB8
TI
SM0
SM1
Serial Port Mode Selection, see
Table 22
.
SM2
Enables the multiprocessor communication feature in
modes 2 and 3. In mode 2 or 3, if SM2 is set to 1 then RI will
not be activated if the received 9th data bit (RB8) is 0. In
mode 1, if SM2 = 1 then RI will not be activated if a valid stop
bit was not received. In mode 0, SM2 should be 0.
REN
Enables serial reception. Set by software to enable reception.
Cleared by software to disable reception.
TB8
Is the 9th data bit that will be transmitted in modes 2 and 3. Set
or cleared by software as desired.
RB8
In modes 2 and 3, is the 9th data bit that was received. In
mode 1, if SM2 = 0, RB8 is the stop bit that was received. In
mode 0, RB8 is not used.
TI
Is the transmit interrupt flag. Set by hardware at the end of the
8th bit time in mode 0, or at the beginning of the stop bit in the
other modes, in any serial transmission. Must be cleared by
software.
RI
Is the receive interrupt flag. Set by hardware at the end of the
8th bit time in mode 0, or halfway through stop bit time in the
other modes, in any serial reception. Must be cleared by
software.
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