參數(shù)資料
型號(hào)： SDA5251-2
廠商： SIEMENS A G
元件分類： 圖文
英文描述： ICs for Consumer Electronics
中文描述： TELETEXT DECODER, PDIP52
文件頁數(shù)： 80/143頁
文件大?。?/td> 1050K
代理商： SDA5251-2
SDA 525x
Semiconductor Group
80
1998-04-08
6.3.7
Two independent general purpose 16-bit timers/ counters are integrated for use in
measuring time intervals, measuring pulse widths, counting events, and causing
periodic (repetitive) interrupts. Either can be configured to operate as timer or event
counter.
In the “timer” function, the registers TLx and/or THx (x = 0, 1) are incremented once
every machine cycle. Thus, one can think of it as counting machine cycles.
A machine cycle consists of 6 or 12 oscillator periods. This depends on the setting of bit
CDC in the Advanced Function Register AFR of the special function registers (see
Chapter “Advanced Function Register” on page 115
). For CDC = 1 a machine cycle
consists of 12 oscillator periods and for CDC = 0 of 6 oscillator periods.
In the “counter” function, the registers TLx and/or THx (x = 0, 1) are incremented in
response to a 1-to-0 transition at its corresponding external input pin, T0 or T1. In this
function, the external input is sampled during every machine cycle. When the samples
show a high in one cycle and a low in the next cycle, the count is incremented. The new
count value appears in the register during the cycle following the one in which the
transition was detected. Since it takes 2 machine cycles (24 oscillator periods for
CDC = 1 or 12 oscillator periods for CDC = 0) to recognize a 1-to-0 transition, the
maximum count rate is 1/24 of the oscillator frequency for CDC = 1 or 1/12 of the
oscillator frequency for CDC = 0. There are no restrictions on the duty cycle of the
external input signal, but to ensure that a given level is sampled at least once before it
changes, it should be held for at least one full machine cycle.
General Purpose Timers/Counters
Table 20
Read-Modify-Write Instructions
Mnemonic
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C
(1)
CLR PX.Y
(1)
SET PX.Y
(1)
(1)
The instruction reads the port byte (all 8 bits), modifies the addressed bit, then writes the new byte back to the latch
Description
logical AND
logical OR
logical EX – OR
jump if bit = 1 and clear bit
complement bit
increment
decrement
decrement and jump if not zero
move carry bit to bit Y of Port X
clear bit Y of Port X
set bit Y of Port X
Example
ANL P1, A
ORL P2, A
XRL P3, A
JBC P1.1, LABEL
CPL P3.0
INC P1
DEC P1
DJNZ P3, LABEL
MOV P1.7, C
CLR P2.6
SET P3.5
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SDA5251M 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5251M-2 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5252 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5252-2 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5252M 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
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