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參數(shù)資料
| 型號： | PDI1394P11BD-S |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | TRIPLE LINE TRANSCEIVER, PQFP64 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 148K |
| 代理商： | PDI1394P11BD-S |
Philips Semiconductors
Product specification
PDI1394P11
3-port physical layer interface
1999 Apr 09
7
12.0
OTHER DEVICE I/O
SYMBOL
PARAMETER
TEST CONDITION
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
IDD
Supply current
VDD = 3.3 V
One port transmitting
One port receiving
One port not connected
60
mA
IDD
Su
ly current
VDD = 3.6 V
175
mA
VDD = 3.6 V
Power-down mode
1.5
2
5
mA
VP
Cable Power Threshold Voltage
RL = 400 k to CPS pin
4.7
7.5
V
VOH
High-level output voltage
IOH = Max., VDD = Min.
VDD – 0.55
V
VOL
Low-level output voltage
IOL = Min., VDD = Max.
0.5
V
II
Input current, LREQ, LPS, PD,
TESTM[1:2]
VI = 5.5 V or 0 V, ISO– = 0
±1.0
A
IOZ
OFF-state output current, CTLn,
Dn, C/LKON I/Os, PC[0:2] inputs
VO = 5.5 V or 0 V, ISO– = 0
±5.0
A
I
Pullup current RESET input
VI = 1.5 V
–20
–40
–80
A
IPU
Pullup current, RESET– input
VI = 0 V
–22
–45
–90
A
I
Pulldown current RESET input
VI = VDD
100
260
450
A
IPD
Pulldown current, RESET– input
PD = high
100
260
450
A
Power-up reset time, RESET– input
C = 0.1
f
2
ms
VTH+
Positive arbitration comparator threshold
voltage
89
168
mV
VTH–
Negative arbitration comparator threshold
voltage
–168
–89
mV
VTH–SP
Speed signal input threshold voltage
49
131
mV
VIT+
Positive going input threshold voltage,
LREQ, CTLn, Dn inputs
VDD/2 + 0.12
VDD/2 + 0.66
V
VIT–
Negative going input threshold voltage,
LREQ, CTLn, Dn inputs
VDD/2 – 0.66
VDD/2 – 0.12
V
VO
TPBIASn output voltage
1.665
1.85
2.015
V
Ib
Absolute value of bus holding current
LREQ, PD, CTLn, Dn inputs, LPS
ISO– = high, VI = 0.5 VDD
190
A
13.0
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST CONDITION
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
R
ΘjA
Junction-to-free-air thermal resistance
Board mounted, no air flow
92.5
°C/W
R
ΘjC
Junction-to-case thermal resistance
10.4
°C/W
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