參數(shù)資料
型號(hào): P89LPC935FHN
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs
封裝: P89LPC933FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<week 47, 2004,;P89LPC933HDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html&l
文件頁數(shù): 58/77頁
文件大?。?/td> 537K
代理商: P89LPC935FHN
P89LPC933_934_935_936
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 12 January 2011
61 of 77
NXP Semiconductors
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
[1]
Parameters are valid over ambient temperature range unless otherwise specified.
[2]
Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.
tSPILAG
SPI enable lag time
slave
250
-
250
-
ns
tSPICLKH
SPICLK HIGH time
master
2
CCLK
-165
-
ns
slave
3
CCLK
-250
-
ns
tSPICLKL
SPICLK LOW time
master
2
CCLK
-165
-
ns
slave
3
CCLK
-250
-
ns
tSPIDSU
SPI data set-up time
master or slave
100
-
100
-
ns
tSPIDH
SPI data hold time
master or slave
100
-
100
-
ns
tSPIA
SPI access time
slave
0
120
0
120
ns
tSPIDIS
SPI disable time
slave
0
240
-
240
ns
tSPIDV
SPI enable to output data valid
time
slave
-
240
-
240
ns
master
-
167
-
167
ns
tSPIOH
SPI output data hold time
0-
0
-
ns
tSPIR
SPI rise time
SPI outputs
(SPICLK, MOSI, MISO)
-
100
-
100
ns
SPI inputs
(SPICLK, MOSI, MISO, SS)
-
2000
-
2000
ns
tSPIF
SPI fall time
SPI outputs
(SPICLK, MOSI, MISO)
-
100
-
100
ns
SPI inputs
(SPICLK, MOSI, MISO, SS)
-
2000
-
2000
ns
Table 12.
Dynamic characteristics (12 MHz) …continued
VDD = 2.4 V to 3.6 V unless otherwise specified.
Tamb = 40 °Cto+85 °C for industrial, 40 °Cto+125 °C for extended, unless otherwise specified.[1][2]
Symbol
Parameter
Conditions
Variable clock
fosc =12 MHz Unit
Min
Max
Min
Max
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