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| 型號： | P89LPC934FDH |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs |
| 封裝： | P89LPC933FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<week 47, 2004,;P89LPC933HDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html&l |
| 文件頁數(shù)： | 59/77頁 |
| 文件大?。?/td> | 537K |
| 代理商： | P89LPC934FDH |
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P89LPC933_934_935_936
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 12 January 2011
62 of 77
NXP Semiconductors
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
Table 13.
Dynamic characteristics (18 MHz)
VDD = 3.0 V to 3.6 V unless otherwise specified.
Symbol
Parameter
Conditions
Variable clock
fosc =18MHz Unit
Min
Max
Min
Max
fosc(RC)
internal RC oscillator frequency
7.189
7.557
7.189
7.557 MHz
fosc(WD)
internal watchdog oscillator
frequency
320
520
320
520
kHz
fosc
oscillator frequency
0
18
-
MHz
Tcy(CLK)
clock cycle
see Figure 27
55
-
ns
fCLKLP
low-power select clock
frequency
08
-
MHz
Glitch filter
tgr
glitch rejection time
P1.5/RST pin
-
50
-
50
ns
any pin except
P1.5/RST
-
15
-
15
ns
tsa
signal acceptance time
P1.5/RST pin
125
-
125
-
ns
any pin except
P1.5/RST
50
-
50
-
ns
External clock
tCHCX
clock HIGH time
see Figure 27
22
Tcy(CLK) tCLCX
22
-
ns
tCLCX
clock LOW time
see Figure 27
22
Tcy(CLK) tCHCX
22
-
ns
tCLCH
clock rise time
see Figure 27
-5
-
5
ns
tCHCL
clock fall time
see Figure 27
-5
-
5
ns
Shift register (UART mode 0)
TXLXL
serial port clock cycle time
see Figure 25
16Tcy(CLK)
-888
-
ns
tQVXH
output data set-up to clock
rising edge time
see Figure 25
13Tcy(CLK)
-722
-
ns
tXHQX
output data hold after clock
rising edge time
see Figure 25
-Tcy(CLK) + 20
-
75
ns
tXHDX
input data hold after clock rising
edge time
see Figure 25
-0
-
0
ns
tXHDV
input data valid to clock rising
edge time
see Figure 25
150
-
150
-
ns
SPI interface
fSPI
SPI operating frequency
slave
0
CCLK
6
03.0
MHz
master
-
CCLK
4
-4.5
MHz
TSPICYC
SPI cycle time
see Figure 26, 28,
slave
6
CCLK
-333
-
ns
master
4
CCLK
-222
-
ns
tSPILEAD
SPI enable lead time
see Figure 29, 30
slave
250
-
250
-
ns
tSPILAG
SPI enable lag time
see Figure 29, 30
slave
250
-
250
-
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC934FDH,529 | 功能描述:8位微控制器 -MCU 80C51 8K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC934FDH-S | 功能描述:8位微控制器 -MCU 80C51 8K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC935 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters |
| P89LPC9351 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC |
| P89LPC9351FA | 功能描述:8位微控制器 -MCU Enhanced LPC935 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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