- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄296762 > P89LPC934FDH (NXP Semiconductors N.V.) 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs PDF資料下載
參數(shù)資料
| 型號： | P89LPC934FDH |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs |
| 封裝： | P89LPC933FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<week 47, 2004,;P89LPC933HDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html&l |
| 文件頁數(shù)： | 21/77頁 |
| 文件大?。?/td> | 537K |
| 代理商： | P89LPC934FDH |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁
P89LPC933_934_935_936
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 12 January 2011
28 of 77
NXP Semiconductors
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
CODE
64 kB of code memory space, accessed as part of program execution and via the
MOVC instruction. The P89LPC933/934/935/936 have 4 KB/8 kB/16 kB of on-chip
Code memory.
The P89LPC935/936 also has 512 bytes of on-chip data EEPROM that is accessed via
SFRs (see Section 8.27 “Data EEPROM (P89LPC935/936)”).
8.11 Data RAM arrangement
The 768 bytes of on-chip RAM are organized as shown in Table 7.
8.12 Interrupts
The P89LPC933/934/935/936 uses a four priority level interrupt structure. This allows
great flexibility in controlling the handling of the many interrupt sources. The
P89LPC933/934/935/936 supports 15 interrupt sources: external interrupts 0 and 1,
timers 0 and 1, serial port Tx, serial port Rx, combined serial port Rx/Tx, brownout detect,
watchdog/Real-Time clock, I2C-bus, keyboard, comparators 1 and 2, SPI, CCU, data
EEPROM write/ADC completion.
Each interrupt source can be individually enabled or disabled by setting or clearing a bit in
the interrupt enable registers IEN0 or IEN1. The IEN0 register also contains a global
disable bit, EA, which disables all interrupts.
Each interrupt source can be individually programmed to one of four priority levels by
setting or clearing bits in the interrupt priority registers IP0, IP0H, IP1, and IP1H. An
interrupt service routine in progress can be interrupted by a higher priority interrupt, but
not by another interrupt of the same or lower priority. The highest priority interrupt service
cannot be interrupted by any other interrupt source. If two requests of different priority
levels are pending at the start of an instruction, the request of higher priority level is
serviced.
If requests of the same priority level are pending at the start of an instruction, an internal
polling sequence determines which request is serviced. This is called the arbitration
ranking.
Remark: The arbitration ranking is only used to resolve pending requests of the same
priority level.
8.12.1 External interrupt inputs
The P89LPC933/934/935/936 has two external interrupt inputs as well as the Keypad
Interrupt function. The two interrupt inputs are identical to those present on the standard
80C51 microcontrollers.
Table 7.
On-chip data memory usages
Type
Data RAM
Size (bytes)
DATA
Memory that can be addressed directly and indirectly
128
IDATA
Memory that can be addressed indirectly
256
XDATA
Auxiliary (‘External Data’) on-chip memory that is accessed
using the MOVX instructions (P89LPC935/936)
512
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P89LPC935FDH | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs |
| P89LPC935FHN | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs |
| P89LPC936FDH | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs |
| P89LPC933HDH | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs |
| P89LPC9381FDH | 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB 3 V byte-erasable flash with 10-bit ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC934FDH,529 | 功能描述:8位微控制器 -MCU 80C51 8K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC934FDH-S | 功能描述:8位微控制器 -MCU 80C51 8K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC935 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters |
| P89LPC9351 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC |
| P89LPC9351FA | 功能描述:8位微控制器 -MCU Enhanced LPC935 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。