參數(shù)資料
型號(hào): P89LPC9341FDH
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs
中文描述: 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PDSO28
封裝: 4.40 MM, PLASTIC, MO-153, SOT361-1, TSSOP-28
文件頁(yè)數(shù): 75/94頁(yè)
文件大?。?/td> 629K
代理商: P89LPC9341FDH
P89LPC9331_9341_9351_9361
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 10 January 2011
77 of 94
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
[1]
Parameters are valid over operating temperature range unless otherwise specified.
[2]
Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.
TSPICYC
SPI cycle time
slave
6
CCLK
-500
-
ns
master
4
CCLK
-333
-
ns
tSPILEAD
SPI enable lead time
slave
250
-
250
-
ns
tSPILAG
SPI enable lag time
slave
250
-
250
-
ns
tSPICLKH
SPICLK HIGH time
master
2
CCLK
-165
-
ns
slave
3
CCLK
-250
-
ns
tSPICLKL
SPICLK LOW time
master
2
CCLK
-165
-
ns
slave
3
CCLK
-250
-
ns
tSPIDSU
SPI data set-up time
master or slave
100
-
100
-
ns
tSPIDH
SPI data hold time
master or slave
100
-
100
-
ns
tSPIA
SPI access time
slave
0
120
0
120
ns
tSPIDIS
SPI disable time
slave
0
240
-
240
ns
tSPIDV
SPI enable to output
data valid time
slave
-
240
-
240
ns
master
-
167
-
167
ns
tSPIOH
SPI output data hold
time
0-
0
-
ns
tSPIR
SPI rise time
SPI outputs (SPICLK,
MOSI, MISO)
-
100
-
100
ns
SPI inputs (SPICLK,
MOSI, MISO, SS)
-
2000
-
2000
ns
tSPIF
SPI fall time
SPI outputs (SPICLK,
MOSI, MISO)
-
100
-
100
ns
SPI inputs (SPICLK,
MOSI, MISO, SS)
-
2000
-
2000
ns
Table 14.
Dynamic characteristics (12 MHz) …continued
VDD = 2.4 V to 3.6 V unless otherwise specified.
Tamb = 40 °Cto+85 °C for industrial applications, 40 °Cto+125 °C extended, unless otherwise specified.[1][2]
Symbol
Parameter
Conditions
Variable clock
fosc =12MHz
Unit
Min
Max
Min
Max
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