參數(shù)資料
型號: P89LPC931FDH
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB-8 kB 3 V Flash with 256-byte data RAM
封裝: P89LPC930FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<week 47, 2004,;P89LPC931FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html&l
文件頁數(shù): 40/55頁
文件大?。?/td> 267K
代理商: P89LPC931FDH
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
45 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1]
Parameters are valid over operating temperature range unless otherwise specied. Parts are tested to 2 MHz, but are guaranteed to
operate down to 0 Hz.
tSPILAG
Enable lag time (Slave)
see Figures
2.0 MHz
250
-
250
-
ns
tSPICLKH
SPICLK high time
see Figures
Master
2
CCLK
-
340
-
ns
Slave
3
CCLK
-
190
-
ns
tSPICLKL
SPICLK low time
see Figures
Master
2
CCLK
-
340
-
ns
Slave
3
CCLK
-
190
-
ns
tSPIDSU
Data set-up time (Master or Slave) see Figures
100
-
100
-
ns
tSPIDH
Data hold time (Master or Slave)
see Figures
100
-
100
-
ns
tSPIA
Access time (Slave)
see Figures
0
120
0
120
ns
tSPIDIS
Disable time (Slave)
see Figures
2.0 MHz
0
240
-
240
ns
tSPIDV
Enable to output data valid
see Figures
2.0 MHz
0
240
-
240
ns
3.0 MHz
0
167
-
167
ns
tSPIOH
Output data hold time
see Figures
0-
0
-
ns
tSPIR
Rise time
see Figures
SPI outputs (SPICLK, MOSI,
MISO)
-
100
-
100
ns
SPI inputs (SPICLK, MOSI,
MISO, SS)
-
2000
-
2000
ns
tSPIF
Fall time
see Figures
SPI outputs (SPICLK, MOSI,
MISO)
-
100
-
100
ns
SPI inputs (SPICLK, MOSI,
MISO, SS)
-
2000
-
2000
ns
Table 8:
AC characteristics…continued
VDD = 2.4 V to 3.6 V unless otherwise specied.
Tamb = 40 °Cto+85 °C for industrial, unless otherwise specied.[1]
Symbol
Parameter
Conditions
Variable clock
fosc =12MHz
Unit
Min
Max
Min
Max
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