參數(shù)資料
型號: P89LPC930FDH
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB-8 kB 3 V Flash with 256-byte data RAM
封裝: P89LPC930FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<week 47, 2004,;P89LPC931FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html&l
文件頁數(shù): 54/55頁
文件大?。?/td> 267K
代理商: P89LPC930FDH
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
8 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P2.0 - P2.7
1, 2, 13,
14, 15, 16,
27, 28
I/O
Port 2: Port 2 is a 8-bit I/O port with a user-congurable output type. During reset
Port 2 latches are congured in the input only mode with the internal pull-up disabled.
The operation of port 2 pins as inputs and outputs depends upon the port
conguration selected. Each port pin is congured independently. Refer to the
section on I/O port conguration and the DC Electrical Characteristics for details.
This port is not available in 20-pin package and is congured automatically as
outputs to conserve power. The alternate functions for these pins must not be
enabled.
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below.
1
I/O
P2.0 — Port 2 bit 0.
2
I/O
P2.1 — Port 2 bit 1.
13
I/O
P2.2 — Port 2 bit 2.
I/O
MOSI — SPI master out slave in. When congured as master, this pin is output,
when congured as slave, this pin is input.
14
I/O
P2.3 — Port 2 bit 3.
I/O
MISO — SPI master in slave out. When congured as master, this pin is input, when
congured as slave, this pin is output.
15
I/O
P2.4 — Port 2 bit 4.
I
SS — SPI Slave select.
16
I/O
P2.5 — Port 2 bit 5.
I/O
SPICLK — SPI clock. When congured as master, this pin is output, when
congured as slave, this pin is input.
27
I/O
P2.6 — Port 2 bit 6.
28
I/O
P2.7 — Port 2 bit 7.
Table 3:
Pin description…continued
Symbol
Pin
Type
Description
相關(guān)PDF資料
PDF描述
P89LPC931FDH 8-bit microcontrollers with two-clock 80C51 core 4 kB-8 kB 3 V Flash with 256-byte data RAM
P89LPC9321FDH 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
P89LPC932A1FDH 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
P89LPC932A1FHN 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
P89LPC9331FDH 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs
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