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參數(shù)資料
| 型號： | NHI-1598ET/883 |
| 廠商： | NATIONAL HYBRID INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CPGA69 |
| 封裝： | 1.100 X 1.100 INCH, CERAMIC, PLUG IN, PGA-69 |
| 文件頁數(shù)： | 89/89頁 |
| 文件大?。?/td> | 569K |
| 代理商： | NHI-1598ET/883 |
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8
Indicates the reception of specific commands by outputting pulses on any one of 8 pins.
Internally loops- back messages under host control for test purposes.
Employs a decoder algorithm which ensures high noise immunity and a low error rate.
Software RT Address Lockout.
MDC3818 Status Response, Error Handling, Status Bit Definition, Mode Code Operation.
Separate Broadcast Interrupts.
3.1.4
Bus Monitor Highlights:
Simple setup and operation
Preset multiple data blocks.
Only two MT Data Start Address and MT Data End Address Registers are required to control
unlimited number of message blocks. The data block sizes and locations are totally
Programmable.
MT initialized by writing to three MT Configuration Registers and the MT Interrupt Mask Register.
Error detection and reporting
All encoding, timing and protocol errors defined by the Protocols are detected.
Programmable Monitor Modes:
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Word Monitor, transfers all data with/ without ID and Time Tag words.
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Message Monitor, transfers all Command and Status words with/ without ID and Time Tag ,
while data words are transferred directly to conserve memory space.
Concurrent Bus Monitor and Remote Terminal operation.
Selective Message Monitor, based on RT Address.
Programmable Interrupt for End of Block and End of Frame.
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