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參數資料
| 型號： | NHI-1598ET/883 |
| 廠商： | NATIONAL HYBRID INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CPGA69 |
| 封裝： | 1.100 X 1.100 INCH, CERAMIC, PLUG IN, PGA-69 |
| 文件頁數： | 53/89頁 |
| 文件大?。?/td> | 569K |
| 代理商： | NHI-1598ET/883 |
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56
TYPICAL NHi-ET INITIALIZATION PROCEDURE BY CPU
Note: If bit 6 in the RTCC or bit 1 in Configuration reg 1 is set to “1”,
the Software reset wil NOT set the busy bit in the Status regs.
7.0.0
INTERRUPT HANDLING
When an interrupt request is received by the NHi-ET, the *IRQ line goes low and header
information about the message that caused the interrupt is pushed on an internal FIFO. If another
interrupt request is received before the CPU performs an acknowledge, it's header information is
also pushed onto the FIFO. I n this manner, there is no danger of losing interrupt vectors or
header information due to receiving multiple interrupt requests before an acknowledge by the
CPU takes place. The FIFO can hold header information for six interrupt messages. If an interrupt
request occurs when the FIFO is full, a vector indicating FIFO overflow is first pushed onto the
FIFO and then the header information for the message which caused the overflow is pushed onto
the FIFO. As a result, the header information from the two oldest messages is lost.
If the FIFO is in the revolving mode, the FIFO will store seven interrupts. When another interrupt
is issued and the FIFO contains seven previous headers, the new header is pushed onto the
FIFO and the oldest header is lost.
7.1.0
HARDWARE INTERRUPT ACKNOWLEDGE
To acknowledge an interrupt in hardware, the *INTACK line is taken low, the *HCS line held high
and the *INTPI line is held low. This pops the interrupt header information off the FIFO and into
the IVR and AVR. The *IRQ line will go high if the FIFO is empty, but remain low if there are
additional interrupt headers on the FIFO. If the NHi-ET is in the RT mode, the IVR will be
outputted on the upper and lower byte of the CPU data bus. If the *INTPI line is high, then
MRTST/
MODE CODE RESET
LOAD POINTER REGS
LOAD POINTER WORDS
LOAD DATA TABLES
INITIALIZE REGS
CLEAR BUSY BIT IN STATUS REGS
SOFTWARE RESET
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