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參數(shù)資料
| 型號： | NHI-1598ET/883 |
| 廠商： | NATIONAL HYBRID INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CPGA69 |
| 封裝： | 1.100 X 1.100 INCH, CERAMIC, PLUG IN, PGA-69 |
| 文件頁數(shù)： | 52/89頁 |
| 文件大小： | 569K |
| 代理商： | NHI-1598ET/883 |
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55
MSG MONITOR ADDR FILTER 1
ALL ADDRESSES UNMASKED
MSG MONITOR ADDR FILTER 2
ALL ADDRESSES UNMASKED
* See RESET BUSY TABLE
RESET FUNCTION TABLE
RESET TYPE
REGISTERS
STATE MACHINES
MODE CODE
RESET
MRST(HARDWARE)
RESET
SOFTWARE
NO CHANGE
RESET
RESET BUSY TABLE
This table defines the state of the Busy bit in the Basic Status and Last Status registers.
RESET TYPE
RTCC REG BIT 6
CONFIG REG1 BIT1
BUSY BIT
MRST(HARDWARE)
X
SET TO “1”
SOFTWARE
0
SET TO “1”
SOFTWARE
X
1
NO CHANGE
SOFTWARE
1
X
NOCHANGE
MODE CODE
X
SET TO “1”
MODE CODE
X
SET TO “1”
MODE CODE
X
SET TO “1”
6.2.0
HOST INITIALIZATION OF NHi-ET
The host will usually want to initialize the ET at power up or at any other time it feels the
procedure is necessary. At power up the host must initialize the registers discussed in the
preceding section if the default settings of the internal initialization are not suitable. In addition the
host must initialize the RAM, the pointer tables, and the data table tag words for each command
type and subaddress.
The host initialization of the registers is also required only after a hardware reset. Since the RAM
is not affected by any resets, it does not have to be re- initialized unless data has been lost or
corrupted, therefore the pointer tables will remain intact.
The following flow diagram is a suggested method of host initialization of the NHi- ET in the RT
mode as a function of the type of reset which has occurred.
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