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參數(shù)資料
| 型號： | NHI-1598ET/883 |
| 廠商： | NATIONAL HYBRID INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CPGA69 |
| 封裝： | 1.100 X 1.100 INCH, CERAMIC, PLUG IN, PGA-69 |
| 文件頁數(shù)： | 36/89頁 |
| 文件大?。?/td> | 569K |
| 代理商： | NHI-1598ET/883 |
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40
STATSTP
Bits: 13
0= Ignore a Status Set condition in the returned RT status word for the message.
1= Halt and go off- line if a Status Set condition is detected in the returned RT status word for
the message.
ERRSTP
Bits: 12
0= Ignore the Error condition in the message.
1= Halt and go off- line if an Error is detected in the message.
GAP
Bits: 11: 0
This field sets the inter-message Gap Time delay. The resolution is 1us and the range of the
delay is 0 to 4ms. The start of the next message in the list is delayed by this interval.
4.4.4
BC TIME TAG MS WORD
This word contains the upper 16 bits of the 32 bit Time Tag.
4.4.5
BC TIME TAG LS WORD
This word contains the lower 16 bits of the 32 bit Time Tag.
4.4.6
BC DATA WORD
This space contains from 1 to 32 data words which are associated with the message.
4.4.7
BC STATUS RESPONSE
This space contains the Status response from the RT
4.4.8
BUS CONTROLLER MESSAGES
The following table illustrates all the message table formats used in the Bus Controller. Notice
that all the components of a message table are located in contiguous ram locations. This
reduces CPU overhead and simplifies software development.
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