參數(shù)資料
型號： NHI-1598ET/883
廠商： NATIONAL HYBRID INC
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), MIL-STD-1553 CONTROLLER, CPGA69
封裝： 1.100 X 1.100 INCH, CERAMIC, PLUG IN, PGA-69
文件頁數(shù)： 21/89頁
文件大?。?/td> 569K
代理商： NHI-1598ET/883
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27
LOCAL_ DYNAMIC_ BUS_ SELECTION
Bits: 3
BC
0 = Message bus unchanged after successful Local Retry.
1 = Automatically switch message to alternate bus in BC Control Word after successful retry on
alternate bus due to Local Retry option.
INHIBIT SOFT_ ADR
Bits: 2
RT
0 = Bits (15: 11) of Basic Status Register set the RT Address when a Write Operation to that
register is performed. The Hard Wired Address sets the RT Address at RESET.
1 = Prevents software change of RT Address when writing to the Basic Status Register.
Bits (15: 11) of Basic Status Register are “Don’t Care”. Only the Hard Wired Address sets the
RT Address at RESET.
CONVERT BUSY BIT
Bits: 1
RT
0 = BUSY Bit is compliant with Mil- Std- 1553B.
1 = Converts BUSY Bit to Non- 1553B operation. BUSY Bit becomes a standard bit with no
special functionality. BUSY Bit is not set during software reset or MODE CODE_ 08 RESET.
SEP_ BCST_ TABLES
Bits: 0
RT
0 = Broadcast messages use the same pointers as receive message:. therefore, receive and
broadcast messages are stored in the same data tables. The BCST bit in the tag word is
used to differentiate between the two message types.
1 = An additional 30 pointers are activated which puts receive and broadcast messages in
separate data tables.
4.2.25
FRAME "A" POINTER
Address: 13
R/ W
BC/ MT
BLOCK "A" START
This register contains the 16 bit FRAME "A" POINTER. This is the address of the active message
list to be used by the BC or the MESSAGE MONITOR for FRAME "A".
In the WORD MONITOR, this register contains the 16 bit start address of BLOCK "A".
4.2.26
FRAME "A" LENGTH
Address: 14
R/ W
BC/ MT
BLOCK "A" END
In the BC and MESSAGE MONITOR modes, this register specifies the number of messages in
FRAME "A" message list and several END- OF- FRAME options.
In the WORD MONITOR, this register contains the 16 bit end address of BLOCK "A".
15
14
13
12
11
10
9
8
RSVD
END OF A
INT
STAT SET
STOP A
FRAME A
ERR STOP
FRAME A
END OPT1
FRAME A
END OPT0
FRAME A
LEN9
FRAME A
LEN8
7
6
5
4
3
2
1
0
FRAME A
LEN7
FRAME A
LEN6
FRAME A
LEN5
FRAME A
LEN4
FRAME A
LEN3
FRAME A
LEN2
FRAME A
LEN1
FRAME A
LEN0
Note: In the Message Monitor mode Bits 12 and 13 are reserved and always read 0.
END OF A INT
Bits: 14
BC/ MT
1 = The BC or the Message Monitor will interrupt when End of FRAME "A" is reached.
0 = End of Frame WILL NOT cause an interrupt.
STAT SET STOP A
Bits: 13
BC
1 = If any BC message in the frame causes a status bit set condition, then BC will stop at the end
of the current frame and go off line.
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