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參數(shù)資料
| 型號(hào)： | NB3N502 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 14 MHz to 190 MHz PLL Clock Multiplier(14MHz到190MHz PLL時(shí)鐘倍頻器) |
| 中文描述： | 14 MHz至190 MHz的PLL時(shí)鐘倍頻（14MHz到190MHz PLL的時(shí)鐘倍頻器） |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 59K |
| 代理商： | NB3N502 |
NB3N502
http://onsemi.com
4
APPLICATIONS INFORMATION
High Frequency CMOS/TTL Oscillators
The NB3N502, along with a low frequency fundamental
mode crystal, can build a high frequency CMOS/TTL output
oscillator. For example, a 20 MHz crystal connected to the
NB3N502 with the 5X output selected (S1 = L, S0 = H)
produces a 100 MHz CMOS/TTL output clock.
External Components
Decoupling Instructions
In order to isolate the NB3N502 from system power
supply, noise decoupling is required. The 0.01 F
decoupling capacitor has to be connected between V
DD
and
GND on pins 2 and 3. It is recommended to place
decoupling capacitors as close as possible to the NB3N502
device to minimize lead inductance. Control input pins can
be connected to device pins V
DD
or GND, or to the V
DD
and
GND planes on the board.
Series Termination Resistor Recommendation
A 33
series terminating resistor can be used on the
CLKOUT pin.
Crystal Load Capacitors Selection Guide
The total onchip capacitance is approximately 12 pF per
pin (C
IN1
and C
IN2
). A parallel resonant, fundamental mode
crystal should be used.
The device crystal connections should include pads for
small capacitors from X1/CLK to ground and from X2 to
ground. These capacitors, C
L1
and C
L2
, are used to adjust the
stray capacitance of the board to match the nominally
required crystal load capacitance (C
LOAD
(crystal)).
Because load capacitance can only be increased in this
trimming process, it is important to keep stray capacitance
to a minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal load capacitors, if
needed, must be connected from each of the pins X1 and X2
to ground. The load capacitance of the crystal (C
LOAD
(crystal)) must be matched by total load capacitance of the
oscillator circuitry network, C
INX
, C
SX
and C
LX
, as seen by
the crystal (see Figure 3 and equations below).
R
C
IN1
12 pF
C
IN2
12 pF
G
Internal
to Device
X2
X1/CLK
C
S1
C
S2
C
L1
C
L2
Crystal
C
LOAD1
= C
IN1
+ C
S1
+ C
L1
[Total capacitance on X1/CLK]
C
LOAD2
= C
IN2
+ C
S2
+ C
L2
[Total capacitance on X2]
C
IN1
C
IN2
12 pF (Typ) [Internal capacitance]
C
S1
C
S2
5 pF (Typ) [External PCB stray capacitance]
C
LOAD1,2
= 2 C
LOAD
(Crystal)
C
L2
= C
LOAD2
C
IN2
C
S2
[External load capacitance on X2]
C
L1
= C
LOAD1
C
IN1
C
S1
[External load capacitance on X1/CLK]
Example 1: Equal stray capacitance on PCB
C
LOAD
(Crystal) = 18 pF (Specified by the crystal manufacturer)
C
LOAD1
= C
LOAD2
= 36 pF
C
IN1
= C
IN2
= 12 pF
C
S1
= C
S2
= 6 pF
C
L1
= 36 12 6 = 18 pF
C
L2
= 36 12 6 = 18 pF
Example 2: Different stray capacitance on PCB trace X1/CLK vs. X2
C
LOAD
(Crystal) = 18 pF
C
LOAD1
= C
LOAD2
= 36 pF
C
IN1
= C
IN2
= 12 pF
C
S1
= 4 pF & C
S2
= 8 pF
C
L1
= 36 12 4 = 20 pF
C
L2
= 36 12 8 = 16 pF
Figure 3. Using a Crystal as Reference Clock
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| NB3N502DG | 功能描述:鎖相環(huán) - PLL PLL CLK MULTIPLIER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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