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MT9072
Data Sheet
200
Zarlink Semiconductor Inc.
Bit
Name
Functional Description
15
#
not used.
14
RCRCRI
Remote CRC-4 and RAI Interrupt.
This bit is one when the corresponding latched status bit
(RCRCRL, register address Y24) is set, and the corresponding mask bit is unmasked
(RCRCRM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
13
RSLPI
Receive Slip Interrupt.
This bit is one when the corresponding latched status bit (RSLPL,
register address Y24) is set, and the corresponding mask bit is unmasked (RSLPM, register
address Y44). This bit is cleared when either this register, or the latched status register is
read.
12
YI
Receive Y-bit Interrupt.
This bit is one when the corresponding latched status bit (YL,
register address Y24) is set, and the corresponding mask bit is unmasked (YM, register
address Y44). This bit is cleared when either this register, or the latched status register is
read.
11
AUXPI
Auxiliary Pattern Interrupt.
This bit is one when the corresponding latched status bit
(AUXPL, register address Y24) is set, and the corresponding mask bit is unmasked (AUXPM,
register address Y44). This bit is cleared when either this register, or the latched status
register is read.
10
RAII
Remote Alarm Indication Status Interrupt.
This bit is one when the corresponding latched
status bit (RAIL, register address Y24) is set, and the corresponding mask bit is unmasked
(RAIM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
9
AISI
Alarm Indication Status Signal Interrupt.
This bit is one when the corresponding latched
status bit (AISL, register address Y24) is set, and the corresponding mask bit is unmasked
(AISM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
8
AIS16I
Alarm Indication Signal 16 Status Interrupt.
This bit is one when the corresponding latched
status bit (AIS16L, register address Y24) is set, and the corresponding mask bit is unmasked
(AIS16M, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
7
LOSSI
Loss of Signal Status Indication Interrupt.
This bit is one when the corresponding latched
status bit (LOSSL, register address Y24) is set, and the corresponding mask bit is unmasked
(LOSSM, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
6
RCRC0I
Remote CRC-4 and RAI T10 Interrupt.
This bit is one when the corresponding latched status
bit (RCRC0L, register address Y24) is set, and the corresponding mask bit is unmasked
(RCRC0M, register address Y44). This bit is cleared when either this register, or the latched
status register is read.
5
RCRC1I
Remote CRC-4 and RAI T450 Interrupt.
This bit is one when the corresponding latched
status bit (RCRC1L, register address Y24) is set, and the corresponding mask bit is
unmasked (RCRC1M, register address Y44). This bit is cleared when either this register, or
the latched status register is read.
Table 178 - Sync, CRC-4 Remote, Alarms, MAS and Phase Interrupt Status Register (Address Y34) (E1)