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參數(shù)資料
| 型號(hào)： | MT90520 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 8-Port Primary Rate Circuit Emulation AAL1 SAR |
| 中文描述： | 8端口基本速率電路仿真AAL1特區(qū) |
| 文件頁(yè)數(shù)： | 83/180頁(yè) |
| 文件大小： | 1736K |
| 代理商： | MT90520 |
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MT90520
Data Sheet
83
Zarlink Semiconductor Inc.
SDT TDM Data Transfer and CAS Nibble Processing
The overall byte extraction process within the SDT RX_SAR is quite similar to that used by the UDT RX_SAR. In
general, the SDT RX_SAR is responsible for transferring a cell received at the UTOPIA interface to the (one or
many) SDT Reassembly Circular Buffer(s) for the VC. In a cell loss or misinsertion condition, the SDT RX_SAR is
responsible for determining the number of dummy cells to be inserted, transferring the appropriate dummy data to
the various SDT Reassembly Circular Buffers and, ultimately, transferring the received cell from the UTOPIA
module to the SDT Reassembly Circular Buffer(s). Besides extracting TDM data bytes, the SDT RX_SAR must
also, in certain modes, extract CAS nibbles, which were previously explained in “SDT Reassembly Circular Buffers”
on page 81.
As in the UDT mode of operation in a cell insertion case, the SDT RX_SAR, under user control, can limit the
number of cells to be inserted into the SDT Reassembly Circular Buffer(s). By default, a maximum of two dummy
cells will be inserted in a cell loss case. However, if the user sets the
SDT_INSERT_LOST
bit in the SDT
Reassembly Control Register at byte-address 2040h, the SDT RX_SAR inserts the number of dummy cells
calculated by the Fast SN Processing state machine in a cell loss case. SDT dummy cells always contain 47 bytes
of user-defined data - no attempt is made to speculate whether pointers or CAS data were present in lost cells.
Therefore, it is possible for pointer reframes to occur after dummy-cell insertions, because extra dummy bytes may
have been inserted into the circular buffers (e.g., if a missing cell contained a pointer, only 46 bytes of dummy fill
should have been inserted into the buffers; however, 47 bytes were inserted, causing a misalignment between the
internal counters of the SDT RX_SAR and the received SDT pointers).
Once the pointer byte (if present) has been processed and before any accesses are made to the SDT Reassembly
Circular Buffers in external memory, the SDT RX_SAR accesses the SDT Reassembly Control Structure in internal
memory to obtain the value of the internal pointer,
Current Entry
. This field, which is used to determine to which
channel within the VC the next byte of data is destined, is initialized to point to the
First Entry
in the VC. Once
Current Entry reaches the last channel in a VC (identified by
Last Entry
, as programmed by the user in the control
structure), it wraps around to First Entry, and the process starts again.The only time that Current Entry digresses
from this path (advancing from First Entry to Last Entry, and then wrapping around) is when a pointer reframe
occurs, as explained in “Pointer Processing” on page 80. When a reframe occurs, the Current Entry pointer is reset
to point to First Entry.
In CAS VCs, another internal variable,
Current Frame
, tracks the advancement through the SDT Reassembly
Control Structure. This variable is used to determine the location at which processing is occurring within a
multiframe. Current Frame increments by one each time that Current Entry wraps around (indicating that all of the
channels in the VC and, therefore, the frame have been serviced). The SDT RX_SAR uses the Current Frame
variable to determine whether to process the current frame of data as TDM payload bytes, or as CAS nibbles; the
last frame of each multiframe (frame 16 in the E1 case, frame 24 in the DS1 case) carries CAS data. Current Frame
is reset to 0 each time it finishes processing the final frame of a multiframe, or when a forced pointer reframe
occurs.
The Current Entry field points to the
Reassembly Circular Buffer Base Address
within the SDT Reassembly
Control Structure which corresponds to the output TDM channel to which the current byte of received cell data is
destined. The pointer is used in combination with the SDT RX_SAR Write Pointer to determine the exact location in
external memory to which the data is written. Each SDT Reassembly Circular Buffer for a VC is addressed by the
same write pointer. The write pointer is incremented by one each time that all of the buffers for the VC have been
written to (i.e., each time Current Entry wraps around).
The data written to each circular buffer entry has the format shown in Figure 29, “Per-Channel SDT Reassembly
Circular Buffer,” on page 82. When a VC is not carrying CAS, multiframes are not used. Therefore, the MF bit is
always 0. Also, in non-CAS VCs, since no CAS is being extracted from received cells, the user should, in most
cases, configure the SDT Reassembly Control Structure for the VC so that the
CASx
field in each entry in the
control structure is 0. Therefore, all zeroes will be written to the CAS field within the corresponding channel’s
Reassembly Circular Buffer. However, if the user wants to send specific CPU-defined signalling out on a channel’s
CSTo output, the user can put the desired data in the CASx fields of the control structure. Whatever data is present
in the CASx fields is always transferred to external memory.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90520AG | 8-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT9072 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT9072AB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT9072AV | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90820 | Large Digital Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90520AG | 制造商:Microsemi Corporation 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays |
| MT90520AG2 | 制造商:Microsemi Corporation 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays |
| MT90528 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT90528AG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT90528AG2 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR |
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