參數(shù)資料
型號(hào)： MT90503AG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 數(shù)字傳輸電路
英文描述： CLIP, STRAIN RELIEF, 50WAY; For use with:820 Series Tripolarized Wiremount Sockets; Ways, No. of:50; Material:Metal; Connector type:Strain Relief RoHS Compliant: Yes
中文描述： ATM SEGMENTATION AND REASSEMBLY DEVICE, PBGA503
封裝： 40 X 40 MM, 2.33 MM HEIGHT, PLASTIC, MS-034, BGA-503
文件頁(yè)數(shù)： 77/233頁(yè)
文件大?。?/td> 1341K
代理商： MT90503AG
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MT90503
Data Sheet
77
Zarlink Semiconductor Inc.
As per the Data Cell FIFO, the CPU can read the error FIFO at any time after obtaining the address to the FIFO
(registers 0714h, 0716h) and the read pointer to the RX_SAR Error Report Structure (register 0710h). Again, an
interrupt can be generated that will trigger if either of two events occurs: when the FIFO becomes more than half full
or if an error report structure has been present in the FIFO for longer than a programmable period of time (register
0724h, 0726h). This interrupt can be enabled in register 0220h.
Errors of more than one type on the same cell will result in one error report structure being created indicating all
types of errors on that cell. The exception to this is cell misinsertion. Since the cell is discarded once the
misinsertion has been detected, no further errors can be found on the misinserted cell.
Figure 32 - RX_SAR Error Report Structure
Field
Name of Field
Byte Address
Offset/bits
Used
Description of Field
RX_SAR Structure
Base Address
[19:5]
RX_SAR
Structure Base
Address [19:5]
+0/b14:b0
Base address of the RX_SAR Control Structure that
caused the Error Report Structure to be generated.
Appended with "00000" as the LSBs to form a 20-bit
address.
Sequence number of the cell that caused the Error
Report Structure to be generated.
Sequence number of the cell which preceded the
one that caused the Error Report Structure to be
generated.
Cell number of the cell that caused the Error Report
Structure to be generated.
A p-byte was expected but was not detected in the
cell that caused the error.
The p-byte that was detected did not match the
p-byte that was expected.
The p-byte that was detected was out-of-range; the
7-bit p-byte must not be 94-126 and must be less
than the sequence length of the corresponding VC.
127 signifies a dummy offset value.
The p-byte detected did not match its parity bit.
Seq
Sequence
Number
Last Sequence
Number
+2/b2:b0
Last Seq
+2/b5:b3
Received Cell
Counter
PA
Received Cell
Counter
P-Byte Absent
Error
P-Byte Framing
Error
P-Byte Range
Error
+4/b15:b0
+6/b15:b0
+0/b15
PF
+2/b15
PR
+2/b14
PP
P-Byte Parity
Error
AAL1 Byte
CRC-3 Error
AAL1 Byte
Parity Error
+2/b13
AC
+2/b12
There was an error detected in the CRC-3.
AP
+2/b11
The AAL1 byte detected did not match its parity bit.
Table 26 - Description of the Fields for the RX_SAR Error Report Structure
Received Cell Counter [15:0]
Received Cell Counter [31:16]
Last Seq
Seq
RX_SAR Structure Base Address[19:5]
PF PR PP AC AP OR UR M ML SL
PA
b15 b14 b13 b12 b11 b10
b9
b8
b7
b6
b5
b4
b3
b1
b0
b2
+0
+2
+4
+6
相關(guān)PDF資料
PDF描述
MT90520 8-Port Primary Rate Circuit Emulation AAL1 SAR
MT90520AG 8-Port Primary Rate Circuit Emulation AAL1 SAR
MT9072 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
MT9072AB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
MT9072AV Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90520 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:8-Port Primary Rate Circuit Emulation AAL1 SAR
MT90520AG 制造商:Microsemi Corporation 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays
MT90520AG2 制造商:Microsemi Corporation 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays
MT90528 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR
MT90528AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR
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