參數(shù)資料
型號(hào): MT9043
廠商: Zarlink Semiconductor Inc.
英文描述: T1/E1 System Synchronizer
中文描述: T1/E1的系統(tǒng)同步
文件頁(yè)數(shù): 15/29頁(yè)
文件大?。?/td> 453K
代理商: MT9043
MT9043
Data Sheet
15
Zarlink Semiconductor Inc.
Figure 10 - Power-Up Reset Circuit
Lock Indicator
The LOCK pin toggles at a random rate when the PLL is frequency locked to the input reference. In Figure 11 the
RC-time-constant circuit can be used to hold the high state of the LOCK pin.
Once the PLL is frequency locked to the input reference, the minimum duration of LOCK pin’s high state would be
32ms and the maximum duration of LOCK pin’s low state would not exceed 1 second. The following equations can
be used to calculate the charge and discharge times of the capacitor.
t
C
= - R
D
C ln(1 – V
T+
/V
DD
) = 240
μ
s
t
C
= Capacitor’s charge time
R
D
= Dynamic resistance of the diode (100
)
C = Capacitor value (1
μ
F)
V
T+
= Positive going threshold voltage of the
Schmitt Trigger (3.0 V)
V
DD
= 3.3 V
t
D
= - R C ln(V
T-
/V
DD
) = 1.65 seconds
t
D
= Capacitor’s discharge time
R = Resistor value (3.3 M
)
C = Capacitor value (1
μ
F)
V
T-
= Negative going threshold voltage of the
Schmitt Trigger (2.0 V)
V
DD
= 3.3 V
+3.3V
RST
R
P
1k
C
10nF
R
10k
MT9043
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