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參數(shù)資料
| 型號： | MT90401 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | SONET/SDH System Synchronizer |
| 中文描述： | 的SONET / SDH系統(tǒng)的同步 |
| 文件頁數(shù)： | 11/38頁 |
| 文件大小： | 650K |
| 代理商： | MT90401 |
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MT90401
Data Sheet
11
Zarlink Semiconductor Inc.
Figure 3 - TIE Corrector Circuit
The DPLL now uses the new virtual reference signal, and since no phase step took place at the input of the DPLL,
no phase step occurs at the output of the DPLL. In other words, reference switching will not create a phase change
at the input of the DPLL, or at the output of the DPLL.
Since internal delay circuitry maintains the alignment between the old virtual reference and the new virtual
reference, a phase error may exist between the selected input reference signal and the output signal of the DPLL.
This phase error is a function of the difference in phase between the two input reference signals during reference
rearrangements. Each time a reference switch is made, the delay between input signal and output signal will
change. The value of this delay is the accumulation of the error measured during each reference switch.
The programmable delay circuit can be reset to zero by applying a logic low pulse to the TIE Circuit Clear (TCLR)
pin. A minimum reset pulse width is 300 ns. This results in a phase realignment between the input reference signal
and the output signal as shown in Figure 16. The speed of the phase alignment correction is limited to 885 ns/s in
SONET mode and 53 ns per 1.326 ms in SDH mode, convergence is in the direction of least phase travel.
The state diagram of Figure 12 indicates the state changes for which the TIE Corrector Circuit is activated.
Programmable
Delay Circuit
Control Signal
Delay Value
TCLR
Resets Delay
Compare
Circuit
TIE Corrector
Enable
from
State Machine
Control
Circuit
Feedback
Signal from
Frequency
Select MUX
PRI or SEC
from Reference
Select Mux
Virtual
Reference to
DPLL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90401AB | 150MA LOW-DROPOUT VOLTAGE REGULATOR SO-8 PKG |
| MT90401AB1 | SONET/SDH System Synchronizer |
| MT9040 | T1/E1 Synchronizer |
| MT9040AN | T1/E1 Synchronizer |
| MT9043 | T1/E1 System Synchronizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90401AB | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH System Synchronizer |
| MT90401AB1 | 制造商:Microsemi Corporation 功能描述:FRAMER SDH/SONET 3.3V 80LQFP EP - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER SONET/SDH 80LQFP 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER SONET/SDH 80LQFP |
| MT9040AN | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1 Synchronizer |
| MT9040AN1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1 /T1 3.3V 48SSOP - Rail/Tube |
| MT9040ANR1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1 /T1 3.3V 48SSOP - Tape and Reel |
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