參數(shù)資料
型號: MT8888C
廠商: Zarlink Semiconductor Inc.
英文描述: Integrated DTMF Transceiver with Intel Micro Interface
中文描述: 集成雙音多頻收發(fā)器與英特爾微型接口
文件頁數(shù): 16/25頁
文件大?。?/td> 536K
代理商: MT8888C
MT8888C
Data Sheet
16
Zarlink Semiconductor Inc.
Figure 16 - Test Circuits
Figure 17 - Application Notes
TEST POINT
MMD6150 (or
equivalent)
5.0 VDC
2.4 k
24 k
130 pF
MMD7000 (or
equivalent)
TEST POINT
5.0 VDC
3 k
100 pF
Test load for IRQ/CP pin
Test load for D0-D3 pins
INITIALIZATION PROCEDURE
A software reset must be included at the beginning of all programs to initialize the control registers after power up.The
initialization procedure should be implemented 100ms after power up.
Description:
Control
Data
b2
X
0
0
0
0
X
RS0
1
1
1
1
1
1
WR
1
0
0
0
0
1
RD
0
1
1
1
1
0
b3
X
0
0
1
0
X
b1
X
0
0
0
0
X
b0
X
0
0
0
0
X
1)
2)
3)
4)
5)
6)
Read Status Register
Write to Control Register
Write to Control Register
Write to Control Register
Write to Control Register
Read Status Register
TYPICAL CONTROL SEQUENCE FOR BURST MODE APPLICATIONS
Transmit DTMF tones of 50 ms burst/50 ms pause and Receive DTMF Tones.
Sequence:
RS0
1
WR
0
RD
1
b3
1
b2
1
b1
0
b0
1
1)
Write to Control Register A
(tone out, DTMF, IRQ, Select Control Register B)
Write to Control Register B
(burst mode)
Write to Transmit Data Register
(send a digit 7)
Wait for an interrupt or poll Status Register
Read the Status Register
2)
1
0
1
0
0
0
0
3)
0
0
1
0
1
1
1
4)
5)
1
1
0
X
X
X
X
-if bit 1 is set, the Tx is ready for the next tone, in which case...
Write to Transmit Register
(send a digit 5)
0
0
1
0
1
0
1
-if bit 2 is set, a DTMF tone has been received, in which case....
Read the Receive Data Register
0
1
0
X
X
X
X
-if both bits are set...
Read the Receive Data Register
Write to Transmit Data Register
NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms (
±
2 ms) AFTER THE
DATA IS WRITTEN TO THE TX DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO
200 ms (
±
4 ms)
.
0
0
1
0
0
1
X
0
X
1
X
0
X
1
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