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參數(shù)資料
| 型號(hào)： | MPC18730EP |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Power Management IC with Five Regulated Outputs Programmed Through 3 Wire Serial Interface |
| 中文描述： | 與電源管理IC，通過(guò)3線串行接口編程五穩(wěn)壓輸出 |
| 文件頁(yè)數(shù)： | 24/35頁(yè) |
| 文件大?。?/td> | 617K |
| 代理商： | MPC18730EP |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
24
18730
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
LOGIC COMMANDS AND REGISTERS
REGISTER MAPPINGS
CLEAR: CLEAR Control
1 = CLEAR is high
0 = CLEAR is low
SLEEP: SLEEP Control
1 = SLEEP is high
0 = SLEEP is low
Reserved: Freescale defined register *1
1 = Forbidden
0 = Required
Reserved: Freescale defined register *1
1 = Forbidden
0 = Required
Reserved: Freescale defined register *1
1 = Forbidden
0 = Required
Reserved : Freescale defined register *1
1 = Forbidden
0 = Required
Reserved : Freescale defined register *1
1 = Forbidden
0 = Required
Reserved: Freescale defined register *1
1 = Forbidden
0 = Required
Note: Do NOT change Reserved Register from default
value.
*1: Data write to this address (1000) is allowed for the
most significant two bits only. The least significant 6 bits are
only used for the factory test. When writing data, always write
0 to these six bits.
PSW1: VOUT1 Power Switch control
1 = Power Switch on
0 = Power Switch off
PSW2: VOUT2 Power Switch control
1 = Power Switch on
0 = Power Switch off
PGOOD1: PGOOD1 Mask *1
1 = PGOOD1 mask on
0 = PGOOD1 mask off
VO2_SENSE: DC/DC Converter Channel 2 output Control
*2
1 = DDC2 on
0 = DDC2 off
SREG1: Series Pass Regulator Channel1 output Control
1 = Regulator on
0 = Regulator off
SREG2: Series Pass Regulator Channel2 output
Control *3
1 = Regulator off
0 = Regulator on
SREG3: Series Pass Regulator Channel3 output Control
1 = Regulator on
0 = Regulator off
PGOOD2: PGOOD2 Mask *1
1 = PGOOD2 mask on
0 = PGOOD2 mask off
*1: When switching the output voltage of VO1_SENSE (2),
write 1 to the PGOOD1 (2) Mask bit in advance to fix the rest
output to High for preventing erroneous operation.
*2: When turning DDC2 OFF, set the PGOOD2 bit to High
to Mask PGOOD2. If you turn DDC2 OFF, the power switch
2 also turns OFF.
Table 17. CLEAR and SLEEP Control Register
1000
Data1
Data2
Bit
3
2
1
0
3
2
1
0
Name
CLEAR
SLEEP
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Default
0
0
0
0
0
0
0
0
Table 18. Power Mode Register
0001
Data1
Data2
Bit
3
2
1
0
3
2
1
0
Name
PSW1
PSW2
PGOOD1
VOUT2
SREG1
SREG2
SREG3
PGOOD2
Default
1
1
0
1
1
1
1
0
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