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參數(shù)資料
| 型號(hào)： | ML14469QP |
| 廠商： | LANSDALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 9600 bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大小： | 238K |
| 代理商： | ML14469QP |
www.lansdale.com
Page 7 of 10
Issue 0
LANSDALE Semiconductor, Inc.
ML14469
Figure 6. Single Line, Simplex Data Transmission
A6,ID6
A5,ID5
A4,ID4
A3,ID3
A2,ID2
A1,ID1
A6,ID6
A5,ID5
A4,ID4
A3,ID3
A2,ID2
A1,ID1
A0,ID0
ADDRESS
0000000
S7
ID7
TRO
CS
REMOTE ML14469
STATIONS
ADDRESS
1111111
ADDRESS
0000001
TRO
10 k
SEND
RI
SEND
RI
SEND
RI
ML14469
127
ML14469
1
ML14469
0
MASTER
STATION
MC6850
ACIA
OR
UART
TRO
RI
10 k
1 k
V+
NOTE: For simplex operation the ID7 must be tied high, S7 must be tied
low, and the 7–bit ID must be the same as the 7–bit address (or set
to some unused address) to prevent erroneous responses.
VSS
VDD
VSS
A6
A5
A4
A3
A2
A1
A0
A6
A5
A4
A3
A2
A1
TRO
REMOTE ML14469 STATIONS
ADDRESS
0000000
ADDRESS
1111111
ADDRESS
0000001
TRO
1 k
10 k
VDD
SEND
VAP
VSS
RI
VDD
SEND
VAP
VSS
RI
VDD
SEND
VAP
VSS
RI
ML14469
127
ML14469
1
ML14469
0
VDD
MASTER
STATION
MC6850
ACIA
OR
UART
VSS
TRO
RI
10 k
1 k
V+
Figure 7. Double Line, Full Duplex Data Transmission
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