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參數(shù)資料
| 型號(hào)： | MK2771-12STR |
| 元件分類(lèi)： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 50 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 69K |
| 代理商： | MK2771-12STR |
MK2771-12
VCXO and Set-Top Clock Source
MDS 2771-12 A
2
Revision 061699
Printed 11/16/00
MicroClock Division of ICS 525 Race Street San Jose CA 95126(408)295-9800tel(408)295-9818fax
I C R O
C LOC K
Pin Descriptions
Key: I = Input, TI = Tri-level input, O = output, P = power supply connection
Pin Assignment
Number
Name
Type
Description
1
PCS0
I
Processor Clock Select 0. Selects PCLK on pin 8. See table above.
2
X2
O
Crystal connection. Connect to a pullable 13.5 MHz crystal.
3
X1
I
Crystal connection. Connect to a pullable 13.5 MHz crystal.
4
AVDD
P
Analog VDD. Connect to +5V.
5
VIN
I
Voltage Input to VCXO. Zero to 3V signal which controls the frequency of the VCXO.
6
VDD
P
Connect to +5V.
7
GND
P
Connect to ground.
8
PCLK
O
Processor clock output determined by status of PCS1,0. See table above.
9
UCLK
O
UART clock output determined by status of UCS. See table above.
10
ACLK
O
49.152 MHz or 24.576 MHz clock output determined by ACS. See table above
11
13.5M
O
13.5 MHz clock output. Divide by two of the 27MHz VCXO output.
12
PCS1
TI
Processor Clock Select 1. Selects PCLK on pin 8. See table above.
13
11.06M
O
11.0592 MHz clock output.
14
GND
P
Connect to ground.
15
VDD
P
Connect to +5V.
16
27M
O
27.00 MHz VCXO clock output.
17
GND
P
Connect to ground.
18
27M
O
27.00 MHz VCXO clock output.
19
UCS
I
UART Clock Select. Selects UCLK on pin 9. See table above.
20
ACS
I
ACLK Select. Selects ACLK on pin 10. See table above.
1
16
2
3
4
15
14
13
AVDD
GND
X2
VDD
GND
5
6
7
8
12
11
10
9
ACLK
UCS
X1
PCS0
27M
ACS
27M
11.06M
13.5M
UCLK
PCLK
PCS1
PCS0
PCLK (MHz)
0
50.000
0
1
16.667
M
0
test
M
1
32.000
1
0
40.000
1
20.000
18
17
19
20
VIN
VDD
PCS1
GND
Processor Clock Select Table
UART Clock Table
UCS
UCLK (MHz)
0
18.432
1
3.6864
0 = connect directly to ground, 1 = connect directly
to VDD, M = leave floating or unconnected
ACLK Select Table
ACS
ACLK (MHz)
0
49.152
1
24.576
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2771-13 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:VCXO and Set-Top Clock Source |
| MK2771-13S | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:VCXO and Set-Top Clock Source |
| MK2771-13STR | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:VCXO and Set-Top Clock Source |
| MK2771-15 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:VCXO and Set-Top Clock Source |
| MK2771-15R | 功能描述:IC CLK SRC VCXO/SET-TOP 28-QSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類(lèi)型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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