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參數(shù)資料
| 型號(hào)： | MK2058-01SITR |
| 英文描述： | Communications Clock Jitter Attenuator |
| 中文描述： | 通信時(shí)鐘抖動(dòng)衰減器 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 150K |
| 代理商： | MK2058-01SITR |
Communications Clock Jitter Attenuator
MDS 2058-01 B
5
Revision 071001
Integrated Circuit Systems, Inc.
G
525 Race Street, San Jose, CA 95126
G
tel (408) 295-9800
G
www.icst.com
MK2058-01
A “normalized” PLL loop bandwidth may be calculated
as follows:
The “normalized” bandwidth equation above does not
take into account the effects of damping factor or the
second pole. However, it does provide a useful
approximation of filter performance.
The loop damping factor is calculated as follows:
Where:
R
Z
= Value of resistor in loop filter (Ohms)
I
CP
= Charge pump current (amps)
(refer to Charge Pump Current Table, below)
N = Crystal multiplier shown in the above table
C
1
= Value of capacitor C
1
in loop filter (Farads)
As a general rule, the following relationship should be
maintained between components C
1
and C
2
in the loop
filter:
Charge Pump Current Table
Special considerations must be made in choosing loop
components C
1
and C
2
:
1) The loop capacitors should be a low-leakage type to
avoid leakage-induced phase noise. For this reason,
DO NOT use any type of polarized or electrolytic
capacitors.
2) Microphonics (mechanical board vibration) can also
induce output phase noise, especially when the loop
bandwidth is less than 1kHz. For this reason, ceramic
capacitors should have C0G or NP0 dielectric. Avoid
high-K dielectrics like Z5U and X7R. These and some
other ceramics have piezoelectric properties that
convert mechanical vibration into voltage noise that
interferes with VCXO operation.
For larger loop capacitor values such as 0.1
μ
F or 1
μ
F,
PPS film types made by Panasonic, or metal poly types
made by Murata or Cornell Dubilier are recommended.
For questions or changes regarding loop filter
characteristics, please contact your sales area FAE, or
ICS MicroClock Applications.
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a
commonly used trace impedance), place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
. (The optional series termination resistor
is not shown in the External Component Schematic.)
Decoupling Capacitors
As with any high performance mixed-signal IC, the
MK2058-01 must be isolated from system power
supply noise to perform optimally.
Decoupling capacitors of 0.01μF must be connected
between each VDD and the PCB ground plane. To
further guard against interfering system supply noise,
the MK2058-01 should use one common connection to
the PCB power plane as shown in the diagram on the
next page. The ferrite bead and bulk capacitor help
reduce lower frequency noise in the supply that can
lead to output clock phase modulation.
R
SET
1.4 M
680 k
540 k
120 k
Charge Pump Current
(I
CP
)
10
μ
A
20
μ
A
25
μ
A
100
μ
A
NBW
R
---------------------------------------
I
N
=
Damping Factor
R
Z
625
----------------------------------C
I
N
1
×
=
C
2
C
1
20
-----
=
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