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參數(shù)資料
| 型號： | MK1574-01SITR |
| 英文描述： | Frame Rate Communications PLL |
| 中文描述： | 幀速率通信鎖相環(huán) |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 83K |
| 代理商： | MK1574-01SITR |
MK1574
Frame Rate Communications PLL
MDS 1574-01 D
MicroClock Division of ICS 525 Race Street San Jose CA 95126(408)295-9800tel(408)295-9818fax
3
Revision 011999
Printed 11/15/00
ICRO
C
LOC K
Parameter
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage Temperature
DC CHARACTERISTICS (VDD = 5V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage
Output High Voltage
Output Low Voltage
Operating Supply Current, IDD
Short Circuit Current
Input Capacitance
AC CHARACTERISTICS (VDD = 5V unless noted)
Input Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle, High Time
Absolute Clock Period Jitter
Actual mean frequency error versus target, note 2
Conditions
Minimum
Typical
Maximum
Units
Referenced to GND
7
V
V
°C
°C
°C
-0.5
0
VDD+0.5
70
250
150
Max of 10 seconds
-65
3
2
5.5
V
V
V
V
V
V
IOH=-4mA
IOH=-25mA
IOL=25mA
No Load, VDD=5.0V
Each output
0.8
VDD-0.4
2.4
0.4
15
±100
7
mA
mA
pF
8.0000
kHz
ns
ns
%
ns
ppm
0.8 to 2.0V
2.0 to 0.8V
At VDD/2
Any clock selection
1.5
1.5
60
0
40
49 to 51
1
0
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. All multipliers as shown in the table on page two are exact, and are stored in ROM on the chip.
External Components/Crystal Selection
The MK1574 requires a minimum number of external components for proper operation. An RC network
(see Capacitor Selection on following page) should be connected between CAP1 and CAP2 as close to the
chip as possible. A high quality ceramic capacitor is recommended. A decoupling capacitor of 0.1μF must
be connected between VDD and GND pins (pins 2 and 3, 5 and 7) close to the chip, and 33
terminating
resistors can be used on clock outputs with traces longer than 1 inch.
Electrical Specifications
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| MK2042-01SI | Circular Connector; No. of Contacts:19; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:14; Circular Contact Gender:Socket; Circular Shell Style:Cable Receptacle; Insert Arrangement:14-19 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK1574-01SLF | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 3.3V FRAME RATE COMMUNICATION PLL RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MK1574-01SLFTR | 功能描述:時鐘合成器/抖動清除器 3.3V FRAME RATE COMMUNICATION PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK1574-01STR | 功能描述:IC PLL FRAME RATE COMM 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK1575-01G | 功能描述:IC CLK RECOVERY PLL 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| MK1575-01GI | 功能描述:IC CLK RECOVERY PLL 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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