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參數(shù)資料
| 型號： | MCM69C232TQ20 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 4K x 64 CAM |
| 中文描述： | 4K X 64 CONTENT ADDRESSABLE SRAM, 160 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 175K |
| 代理商： | MCM69C232TQ20 |
MCM69F817
13
MOTOROLA FAST SRAM
K
ADSC
ADDRESS
WRITE
A1
A2
ADSC
(INITIATES
BURST WRITE)
CLOCK STOP
(CONTINUE
BURST WRITE)
WAKE UP ADSC
(INITIATES BURST WRITE)
D(A1)
DATA IN
D(A1+1)
D(A2)
DQx
HIGH–Z
ADV
VIH OR VIL FIXED (SEE NOTE)
NOTE: While the clock is stopped, DATA IN must be fixed in a high (VIH) or low (VIL) state to reduce the DC current of the
input buffers. For lowest power operation, all data and address lines should be held in a low (VIL) state and control
lines held in an inactive state.
STOP CLOCK WITH WRITE TIMING
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM69C232TQ20R | 4K x 64 CAM |
| MCM69C432 | 16K x 64 CAM |
| MCM69C432TQ20 | 16K x 64 CAM |
| MCM69C432TQ20R | 16K x 64 CAM |
| MCM69D536 | 32K x 36 Bit Synchronous Dual I/O, Dual Address SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM69C232TQ20R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4K x 64 CAM |
| MCM69C233TQ15 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MCM69C233WD | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MPC8260 PowerQUICC II-TM to CAM Interfacing ? MCM69C233 |
| MCM69C233WP | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MPC8260 PowerQUICC II-TM to CAM Interfacing ? MCM69C233 |
| MCM69C432 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16K x 64 CAM |
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