參數(shù)資料
型號(hào): MCIMX31
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁數(shù): 86/170頁
文件大?。?/td> 1562K
代理商: MCIMX31
i.MX31/i.MX31L Advance Information, Rev. 1.4
86
Freescale Semiconductor
Preliminary
Electrical Characteristics
NOTE
Timing for HCLK is 133 MHz and internal LCLK (flash clock) is 22.5 MHz
(45 ns). All timings are listed according to this LCLK frequency (multiples
of LCLK phases) except NF16, which is not LCLK related.
4.3.9.1.2
One-Cycle NFC Mode
Figure 25
,
Figure 26
,
Figure 27
, and
Figure 28
depict the relative timing requirements among different
signals of the NFC at module level for one-cycle mode, and
Table 32
lists the timing parameters.
Figure 25. Command Latch Cycle Timing DIagram—One Flash Clock Cycle
Figure 26. Address Latch Cycle Timing DIagram—One Flash Clock Cycle
NFCLE
NFCE
NFWE
NFALE
NFIO[7:0]
command
NF9_one
NF8_one
NF1_one
NF2_one
NF5_one
NF3_one
NF4_one
NF6_one
NF7_one
NFCLE
NFCE
NFWE
NFALE
NFIO[7:0]
Address
NF9_one
NF8_one
NF1_one
NF5_one
NF3_one
NF4_one
NF6_one
NF11_one
NF10_one
NF7_one
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