參數(shù)資料
型號: MCIMX31
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應用處理器
文件頁數(shù): 68/170頁
文件大?。?/td> 1562K
代理商: MCIMX31
i.MX31/i.MX31L Advance Information, Rev. 1.4
68
Freescale Semiconductor
Preliminary
Electrical Characteristics
4.3.2
AC Electrical Characteristics
Figure 3
depicts the load circuit for output pads.
Figure 4
depicts the output pad transition time waveform.
The range of operating conditions appears in
Table 16
for slow general I/O,
Table 17
for fast general I/O,
and
Table 18
for DDR I/O (unless otherwise noted).
Figure 3. Load Circuit for Output Pad
Table 15. DDR (Double Data Rate) I/O Pads DC Electrical Parameters
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
High-level output voltage
1
1
Max operating voltage for DDR pads with all drive strengths is 1.95 V.
2
Tested per I/O pad.
3
Input current conditions: Typical condition: typ model, 1.875 V and 25°C. Max condition: bcs model, 3.3 V and 105°C
V
OH
I
OH
= –1 mA
OVDD –0.12
V
I
OH
= spec’ed Drive
0.8*OVDD
V
Low-level output voltage
V
OL
I
OL
= 1 mA
0.08
V
I
OL
= spec’ed Drive
0.2*OVDD
V
High-level output current
2
I
OH
V
OH
=0.8*OVDD
Std Drive
High Drive
Max Drive
DDR Drive
–3.6
–7.2
–10.8
–14.4
mA
Low-level output current
2
I
OL
V
OL
=0.2*OVDD
Std Drive
High Drive
Max Drive
DDR Drive
3.6
7.2
10.8
14.4
mA
High-Level DC input voltage of CMOS receiver
V
IH
0.7*OVDD
OVDD
OVDD+0.3
V
Low-Level DC input voltage of CMOS receiver
V
IL
–0.3
0
0.3*OVDD
V
Low-level input current
3
I
IL
V
I
= 0
900
nA
High-level input current
I
IH
V
I
= OVDD
140
nA
Tri-state Hi-Z current
I
Z
V
I
= OVDD or 0
2
μ
A
Test Point
From Output
Under Test
CL
CL includes package, probe and jig capacitance
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