參數(shù)資料
型號: MCIMX31_07
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁數(shù): 48/108頁
文件大小: 1235K
代理商: MCIMX31_07
i.MX31/i.MX31L Advance Information, Rev. 2.3
48
Freescale Semiconductor
Electrical Characteristics
Figure 39
depicts the setup and hold requirements of the trace data pins with respect to TRACECLK, and
Table 37
lists the timing parameters.
Figure 39. Trace Data Timing Diagram
4.3.10.1
Half-Rate Clocking Mode
When half-rate clocking is used, the trace data signals are sampled by the TPA on both the rising and
falling edges of TRACECLK, where TRACECLK is half the frequency of the clock shown in
Figure 39
.
4.3.11
FIR implements asynchronous infrared protocols (FIR, MIR) that are defined by IrDA
(Infrared Data
Association). Refer to http://www.IrDA.org for details on FIR and MIR protocols.
FIR Electrical Specifications
4.3.12
Fusebox Electrical Specifications
Table 36. ETM TRACECLK Timing Parameters
ID
Parameter
Min
Max
Unit
T
cyc
Clock period
Frequency dependent
ns
T
wl
Low pulse width
2
ns
T
wh
High pulse width
2
ns
T
r
Clock and data rise time
3
ns
T
f
Clock and data fall time
3
ns
Table 37. ETM Trace Data Timing Parameters
ID
Parameter
Min
Max
Unit
T
s
Data setup
2
ns
T
h
Data hold
1
ns
Table 38. Fusebox Timing Characteristics
Ref. Num
Description
Symbol
Minimum
Typical
Maximum
Units
1
Program time for eFuse
1
1
The program length is defined by the value defined in the epm_pgm_length[2:0] bits of the IIM module. The value to program
is based on a 32 kHz clock source (4 * 1/32 kHz = 125 μs)
t
program
125
μs
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