參數(shù)資料
型號(hào): MCIMX27
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Multimedia Applications Processor(多媒體應(yīng)用處理器)
中文描述: 多媒體應(yīng)用處理器(多媒體應(yīng)用處理器)
文件頁數(shù): 90/118頁
文件大?。?/td> 1159K
代理商: MCIMX27
i.MX27 Data Sheet, Advance Information, Rev. 0.1
90
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Signal Descriptions
All timings are on AUDMUX pads when the SSI is being used for data
transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
For internal Frame Sync operation using external clock, the FS timing will
be same as that of Tx Data, for example, during the AC97 mode of
operation.
3.5.18
Wireless External Interface Module (WEIM)
All WEIM output control signals may be asserted and deasserted by internal clock related to BCLK rising
edge or falling edge according to corresponding assertion/negation control fields. Address always begins
related to BCLK falling edge but may be ended both on rising and falling edge in muxed mode according
to control register configuration. Output data begins related to BCLK rising edge except in muxed mode
where both rising and falling edge may be used according to control register configuration. Input data,
ECB and DTACK all captured according to BCLK rising edge time.
Figure 52
shows the timing of the
WEIM module, and
Table 49
lists the timing parameters.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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