參數(shù)資料
型號: MAX1894
廠商: Maxim Integrated Products, Inc.
元件分類: 數(shù)字信號處理
英文描述: Fixed-Point Digital Signal Processor 256-BGA
中文描述: 高級Li+電池組保護器
文件頁數(shù): 13/16頁
文件大小: 308K
代理商: MAX1894
M
Advanced Li+ Battery-Pack Protectors
______________________________________________________________________________________
13
Protecting and Filtering Cell Inputs
Resistors in series with each B_P pin are recommend-
ed to limit the current in case there is a short between
adjacent B_P pins (see Figure 1).
The intermediate cell input bias current is typically
0.5nA. A 1k
resistor in series with any intermediate
cell moves the overvoltage trip point by typically 0.5mV,
which is insignificant compared to the ±25mV tolerance
in the overvoltage threshold. The top cell input bias cur-
rent during sampling period is typically 60μA. To
reduce the voltage change on the top cell input due to
sampling current, a filter resistance of 10
to 50
should be added in series with the top cell. To attain
the desired filter characteristics, the capacitance
across the two top cell input pins should be 1μF.
The MAX1894/MAX1924 have internal ESD diodes on
each B_P pin for ESD protection up to 2kV. When high-
er ESD ratings are needed, capacitors (typically 0.1μF)
can be added across adjacent B_P pins (see Figure 1).
The RC filters improve the device immunity to ESD and
filter the noise spikes on B1P
B4P to prevent the
MAX1894/MAX1924 from being triggered and latched
prematurely by noise spikes.
Control Pins SHDN and CTL
SHDN and CTL allow external logic or microprocessors
to control the MAX1894/MAX1924 gate drivers. Drive
CTL high to turn off the three protection MOSFETs:
DSO
,
CGO
, and
TKO
. Drive SHDN high to force the MAX1894/
MAX1924 into shutdown mode (with no charger applied).
SHDN and CTL do not affect the state machine. Toggling
these two pins does not change the state or reset any
fault conditions. If external control circuitry or a micro-
processor is not used, connect SHDN and CTL to PKN.
Layout Considerations
Good layout is important to minimize the effects of
noise on the system and to ensure accurate voltage
and current measurements. Use the appropriate trace
widths for the high-current paths and keep traces short
to minimize parasitic inductance and capacitance.
Minimize current-sense resistor trace lengths and make
use of Kelvin connections to the resistor. Provide ade-
quate space and board area for the external MOSFETs
and sense resistor to dissipate the heat required. Place
RC filters close to B1P
B4P pins.
Figure 7. Pack-Short Current Fault
NORMAL OPERATION
V
RSENSE
> V
PS_TH
FOR 450
μ
s
SET OD = 1
DSO, CGO, TKO = H
V
SRC
> V
B4P
+ 0.1V
NO
NO
YES
YES
Chip Information
TRANSISTOR COUNT: 4259
Table 3. MOSFET Selection
P-CHANNEL
MOSFETS
IRF7404
IRF7406
Si4431
Si4947 (dual)
MAXIMUM DRAIN
CURRENT (A)
6.7
5.8
5.8
3.5 EA
相關(guān)PDF資料
PDF描述
MAX1894-MAX1924 Fixed-Point Digital Signal Processor 288-FCBGA
MAX1925 Fixed-Point Digital Signal Processor 548-FCBGA
MAX1926 Switch-Mode 1-Cell Li+ Chargers
MAX1926ETC Switch-Mode 1-Cell Li+ Chargers
MAX1925ETC Switch-Mode 1-Cell Li+ Chargers
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