- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9906 > MAX1283BEUE+T (Maxim Integrated Products)IC ADC 12BIT 300KSPS 16-TSSOP PDF資料下載
參數(shù)資料
| 型號： | MAX1283BEUE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 300KSPS 16-TSSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 400k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 8.0mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極；4 個單端，雙極；2 個偽差分，單極；2 個偽差分，雙極 |
MAX1282/MAX1283
Once conversion is completed, the device goes into the
programmed power mode until a new control byte is
written.
The power-up delay is dependent on the power-down
state. Software low-power modes will be able to start
conversion immediately when running at decreased
clock rates (see Power-Down Sequencing). Upon
power-on reset, when exiting software full power-down
mode, or when exiting hardware shutdown, the device
goes immediately into full-power mode and is ready to
convert after 2s when using an external reference.
When using the internal reference, wait for the typical
power-up delay from a full power-down (software or
hardware) as shown in Figure 8.
Software Power-Down
Software power-down is activated using bits PD1 and
PD0 of the control byte. When software power-down is
asserted, the ADC completes the conversion in
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
14
______________________________________________________________________________________
BIT
NAME
DESCRIPTION
7(MSB)
START
The first logic 1 bit after CS goes low defines the beginning of the control byte.
6
SEL2
These three bits select which of the eight channels are used for the conversion (Tables 1 and 2).
5
SEL1
4
SEL0
3
UNI/BIP
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, an
analog input signal from 0 to VREF can be converted; in bipolar mode, the differential signal can
range from -VREF/2 to +VREF/2.
2
SGL/DIF
1 = single ended, 0 = pseudo-differential. Selects single-ended or pseudo-differential conver-
sions. In single-ended mode, input signal voltages are referred to COM. In pseudo-differential
mode, the voltage difference between two channels is measured (Tables 1 and 2).
1
PD1
Select operating mode.
0(LSB)
PD0
PD1
PD0
Mode
0
Full power-down
0
1
Fast power-down
1
0
Reduced power
1
Normal operation
Table 3. Control-Byte Format
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(MSB)
(LSB)
START
SEL2
SEL1
SEL0
UNI/BIP
SGL/DIF
PD1
PD0
PD1/PD0
MODE
CONVERTING
(mA)
AFTER
CONVERSION
INPUT COMPARATOR
REFERENCE
00
Full Power-Down
(FULLPD)
2.5
2A
Off
01
Fast Power-Down
(FASTPD)
2.5
0.9mA
Reduced Power
On
10
Reduced-Power
Mode (REDP)
2.5
1.3mA
Reduced Power
On
11
Normal Operating
2.5
2.0mA
Full Power
On
CIRCUIT SECTIONS*
TOTAL SUPPLY CURRENT
Table 4. Software-Controlled Power Modes
*Circuit operation between conversions; during conversion all circuits are fully powered up.
發(fā)布緊急采購，3分鐘左右您將得到回復。