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參數(shù)資料
| 型號： | M54HC00F1R |
| 廠商： | 意法半導體 |
| 英文描述： | QUAD 2-INPUT NAND GATE |
| 中文描述： | 四2輸入與非門 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 234K |
| 代理商： | M54HC00F1R |
M54HC00
M74HC00
December1992
QUAD 2-INPUT NAND GATE
B1R
(Plastic Package)
ORDER CODES :
M54HC00F1R
M74HC00B1R
M74HC00M1R
M74HC00C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.
HIGH SPEED
t
PD
= 6 ns (TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 1
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUTSDRIVE CAPABILITY
10 LSTTL LOADS
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS00
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
The M54/74HC00 is a high speedCMOS QUAD2-
INPUT NAND GATE fabricated in silicon gate
C
2
MOStechnology.Ithas thesame highspeedper-
formance of LSTTL combined with true CMOS low
power consumption. The internal circuit is com-
posedof 3 stages including bufferoutput, which en-
ables high noise immunity and stable output. All
inputs are equipped with protection circuits against
staticdischarge and transient excess voltage.
DESCRIPTION
1/9
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