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CLOCK
DATA
300ns (min.)
5
Figure 3
There must be a complete set of 36 clocks or the
shift registers will not clear.
When power is first applied to the chip an internal
power ON reset signal is generated which resets
all registers and all latches. The START bit and the
first clock return the chip to its normal operation.
Figure 3 shows the timing relationships between
Data, and Clock. A maximum clock frequency of
0.5MHz is assumed.
Figure 4 shows the Output Data Format for the
M5480. Because it uses only 23 of the possible
35 outputs, 12 of the bits are "Don’t Care".
For applications where a lesser number of outputs
are used, it is possible to either increase the current
per output, or operate the part at higher than 1V
V
OUT
.
The following equation can be used for calcula-
tions.
Figure 4 :
Serial Data Bus / Outputs Correspondance
5451
5480
35
X
34
23
33
22
32
21
31
20
30
19
29
X
28
X
27
18
26
X
25
17
24
16
23
15
22
14
21
13
20
12
19
X
START
START
5451
5480
18
X
17
X
16
X
15
11
14
10
13
9
12
8
11
X
10
X
9
X
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
X
START
START
5
TYPICAL APPLICATION
BASIC 3
1/2
Digit Interface.
23 SEGMENTS
CLOCK
DATA
M5480
DISPLAY DRIVER
5
V
D
VOUT
R
I
D
+V
C
5
a)
T
j
= [ (V
OUT
) (I
LED
) (No.of segments) + V
DD
. 7 mA
] (132
°
C/W) + T
amb
where:
T
j
= junction temperature (150
°
C max)
V
OUT
= the voltage at the LED driver outputs
I
LED
= the LED current
132
°
C/W = thermal coefficient of the package
T
amb
= ambient temperature
POWER DISSIPATION OF THE IC
The power dissipation of the IC can be limited using
different configurations.
In this application R must be chosen taking into
account the worst operating conditions.
R is determined by the maximum number of seg-
ments activated.
R
=
V
C
V
D
MAX
V
OUT MIN
N
MAX
I
D
M5480
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