參數(shù)資料
型號(hào)： M48T129V-70CS1
廠商： 意法半導(dǎo)體
元件分類： SRAM
英文描述： 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
中文描述： 3.3 - 5V的1兆位的SRAM 128KB的x8計(jì)時(shí)器
文件頁(yè)數(shù)： 5/22頁(yè)
文件大小： 140K
代理商： M48T129V-70CS1
5/22
M48T129Y, M48T129V
Table 4. AC Measurement Conditions
Note that Output Hi-Z is defined as the point wheredata is no longer
driven.
Input Rise and Fall Times
≤
5ns
Input Pulse Voltages
0 to 3V
Input and Output Timing Ref. Voltages
1.5V
Figure 5. AC Testing Load Circuit
Note: Excluding open drain output pins
AI01803C
CL= 100pF
CLincludes JIG capacitance
650
DEVICE
UNDER
TEST
1.75V
Table 3. Operating Modes
(1)
Mode
Note: 1. X = V
or V
; V
= Battery Back-up Switchover Voltage.
2. See Table 7 for details.
V
CC
E
G
W
DQ0-DQ7
Power
Deselect
4.5V to 5.5V
or
3.0V to 3.6V
V
IH
V
IL
V
IL
V
IL
X
X
High Z
Standby
Write
X
V
IL
V
IH
V
IH
D
IN
D
OUT
Active
Read
V
IL
V
IH
Active
Read
High Z
Active
Deselect
V
SO
to V
PFD
(min)
(2)
X
X
X
High Z
CMOS Standby
Deselect
≤
V
SO(2)
X
X
X
High Z
Battery Back-up Mode
external copies are independent of internal func-
tions except that they are updated periodically by
the simultaneoustransfer of theincremented inter-
nal copy. TIMEKEEPER and Alarm Registers
store data in BCD.
DATA RETENTION MODE
With valid V
CC
applied, the M48T129Y/V operates
as a conventional BYTEWIDE
Should the supply voltage decay, the RAMwill au-
tomatically deselect, write protecting itself when
V
CC
falls between V
PFD
(max), V
PFD
(min) win-
dow. All outputs become high impedance and all
inputs are treated as ”don’t care”.
Note:
Apower failure during a writecycle may cor-
rupt data at the current addressed location, but
does not jeopardize the rest of the RAM’s content.
At voltages below V
PFD
(min), the memory will be
in a write protected state, provided the V
CC
fall
time is not less than t
F
. The M48T129Y/V may re-
spond to transient noise spikes on V
CC
that cross
into the deselect window during the time the de-
vice issampling V
CC
. Therefore, decoupling of the
power supply lines is recommended.
When V
CC
drops below V
SO
, the control circuit
switches power to the internal battery, preserving
data and powering the clock. The internal energy
source will maintain data in the M48T129Y/V for
an accumulatedperiod of at least 10 years atroom
temperature. As system power rises above V
SO
,
the battery is disconnected, and the power supply
is switchedto external V
CC
. Deselectcontinues for
t
REC
after V
CC
reaches V
PFD
(max). For a further
more detailed review of lifetime calculations,
please see Application Note AN1012.
static RAM.
TIMEKEEPER REGISTERS
The M48T129Y/V offers 16 internal registers
which contain TIMEKEEPER, Alarm, Watchdog,
Interrupt, Flag, and Control data. These registers
are memory locations whichcontain external (user
accessible) and internal copies ofthe data (usually
referred to as BiPORT TIMEKEEPER cells). The
相關(guān)PDF資料
PDF描述
M48T129V-70PM1 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
M48T129 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M48T129V-70PM1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3V, 1 Mbit (128 Kbit x 8) TIMEKEEPER SRAM
M48T129V-85CS1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
M48T129V-85PM1 功能描述:實(shí)時(shí)時(shí)鐘 1M (128Kx8) 85ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
M48T129VPM 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
M48T129VSH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
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