- 您現(xiàn)在的位置：買賣IC網 > PDF目錄359063 > M41T81SMY6T (意法半導體) Serial Access Real-Time Clock with Alarms PDF資料下載
參數(shù)資料
| 型號： | M41T81SMY6T |
| 廠商： | 意法半導體 |
| 英文描述： | Serial Access Real-Time Clock with Alarms |
| 中文描述： | 串行訪問實時時鐘與鬧鐘 |
| 文件頁數(shù)： | 18/29頁 |
| 文件大小： | 438K |
| 代理商： | M41T81SMY6T |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
M41T81S
18/29
Century Bit
Bits D7 and D6 of Clock Register 03h contain the
CENTURY ENABLE Bit (CEB) and the CENTURY
Bit (CB). Setting CEB to a '1' will cause CB to tog-
gle, either from a '0' to '1' or from '1' to '0' at the turn
of the century (depending upon its initial state). If
CEB is set to a '0,' CB will not toggle.
Battery Low Warning
The M41T81S automatically performs battery volt-
age monitoring upon power-up and at factory-pro-
grammed time intervals of approximately 24
hours. The Battery Low (BL) Bit, Bit D4 of Flags
Register 0Fh, will be asserted if the battery voltage
is found to be less than approximately 2.5V. The
BL Bit will remain asserted until completion of bat-
tery replacement and subsequent battery low
monitoring tests, either during the next power-up
sequence or the next scheduled 24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below ap-
proximately 2.5 volts and may not be able to
maintain data integrity. Clock data should be con-
sidered suspect and verified as correct. A fresh
battery should be installed.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal V
CC
is
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
battery should be replaced.
The M41T81S only monitors the battery when a
nominal V
CC
is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique.
Oscillator Fail Detection
If the Oscillator Fail Bit (OF) is internally set to '1,'
this indicates that the oscillator has either stopped,
or was stopped for some period of time and can be
used to judge the validity of the clock and date da-
ta.
In the event the OF Bit is found to be set to '1' at
any time other than the initial power-up, the STOP
Bit (ST) should be written to a '1,' then immediately
reset to '0.' This will restart the oscillator.
The following conditions can cause the OF Bit to
be set:
–
The first time power is applied (defaults to a '1'
on power-up).
–
The voltage present on V
CC
is insufficient to
support oscillation.
–
The ST Bit is set to '1.'
–
External interference of the crystal.
The OF Bit will remain set to '1' until written to logic
'0.' The oscillator must start and have run for at
least 4 seconds before attempting to reset the OF
Bit to '0.'
Oscillator Fail Interrupt Enable
If the Oscillator Fail Interrupt Bit (OFIE) is set to a
'1,' the IRQ pin will also be activated. The IRQ out-
put is cleared by resetting the OFIE or OF Bit to '0'
(not be reading the Flags Register).
Output Driver Pin
When the FT Bit, AFE Bit, SQWE Bit, and Watch-
dog Register are not set, the IRQ/FT/OUT/SQW
pin becomes an output driver that reflects the con-
tents of D7 of the Calibration Register. In other
words, when D7 (OUT Bit) and D6 (FT Bit) of ad-
dress location 08h are a '0,' then the IRQ/FT/OUT/
SQW pin will be driven low.
Note:
The IRQ/FT/OUT/SQW pin is an open drain
which requires an external pull-up resistor.
Preferred Initial Power-on Default
Upon initial application of power to the device, the
following register bits are set to a '0' state: Watch-
dog Register; AFE; ABE; SQWE; OFIE; and FT.
The following bits are set to a '1' state: ST; OUT;
OF; and HT (see
Table 5., page 18
).
Table 5. Preferred Default Values
Note: 1. BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = Unchanged
Condition
ST
HT
Out
FT
AFE
SQWE
ABE
WATCHDOG
Register
(1)
OF
OFIE
Initial Power-up
(2)
1
1
1
0
0
0
0
0
1
0
Subsequent Power-up
(with battery back-up)
(3)
UC
1
UC
0
UC
UC
UC
0
UC
UC
相關PDF資料 |
PDF描述 |
|---|---|
| M41T81SM6E | Serial Access Real-Time Clock with Alarms |
| M41T81SM6FT | Serial Access Real-Time Clock with Alarms |
| M41T81SMY6E | Serial Access Real-Time Clock with Alarms |
| M41T81SMY6F | Serial Access Real-Time Clock with Alarms |
| M440T1MV-15ZA9 | 3.3V, 32 Mbit (1024 Kbit x 32) TIMEKEEPER SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M41T82 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial I2C bus RTC with battery switchover |
| M41T82_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial I2C bus RTC with battery switchover |
| M41T82_10 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial I2C bus RTC with battery switchover |
| M41T82RM6E | 功能描述:實時時鐘 Serial I2C bus RTC W/ battry switchover RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M41T82RM6F | 功能描述:實時時鐘 Serial I2C bus RTC RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復。