參數(shù)資料
型號: M41T81SMY6E
廠商: 意法半導(dǎo)體
英文描述: Serial Access Real-Time Clock with Alarms
中文描述: 串行訪問實(shí)時(shí)時(shí)鐘與鬧鐘
文件頁數(shù): 16/29頁
文件大小: 438K
代理商: M41T81SMY6E
M41T81S
16/29
Table 3. Alarm Repeat Modes
Watchdog Timer
The watchdog timer can be used to detect an out-
of-control microprocessor. The user programs the
watchdog timer by setting the desired amount of
time-out into the Watchdog Register, address 09h.
Bits BMB4-BMB0 store a binary multiplier and the
two lower order bits RB1-RB0 select the resolu-
tion, where 00 = 1/16 second, 01 = 1/4 second,
10 = 1 second, and 11 = 4 seconds. The amount
of time-out is then determined to be the multiplica-
tion of the five-bit multiplier value with the resolu-
tion. (For example: writing 00001110 in the
Watchdog Register = 3*1, or 3 seconds). If the
processor does not reset the timer within the spec-
ified period, the M41T81S sets the WDF (Watch-
dog Flag) and generates a watchdog interrupt.
The watchdog timer can be reset by having the mi-
croprocessor perform a WRITE of the Watchdog
Register. The time-out period then starts over.
Should the watchdog timer time-out, a value of
00h needs to be written to the Watchdog Register
in order to clear the IRQ/FT/OUT/SQW pin. This
will also disable the watchdog function until it is
again programmed correctly. A READ of the Flags
Register will reset the Watchdog Flag (Bit D7;
Register 0Fh).
The watchdog function is automatically disabled
upon power-up and the Watchdog Register is
cleared. If the watchdog function is set, the fre-
quency test function is activated, and the SQWE
Bit is '0,' the watchdog function prevails and the
frequency test function is denied.
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm Setting
1
1
1
1
1
Once per Second
1
1
1
1
0
Once per Minute
1
1
1
0
0
Once per Hour
1
1
0
0
0
Once per Day
1
0
0
0
0
Once per Month
0
0
0
0
0
Once per Year
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