參數(shù)資料
型號(hào): M41T315Y-85MQ6E
廠商: 意法半導(dǎo)體
英文描述: Serial Access Phantom RTC Supervisor
中文描述: 串行訪問幻影時(shí)鐘監(jiān)
文件頁數(shù): 8/24頁
文件大?。?/td> 404K
代理商: M41T315Y-85MQ6E
M41T315Y*, M41T315V, M41T315W
8/24
Non-volatile Supervisor Operation
A switch is provided to direct power from the bat-
tery input or V
CCI
to V
CCO
with a maximum voltage
drop of 0.3 Volts. The V
CCO
output pin is used to
supply uninterrupted power to CMOS SRAM. The
M41T315Y/V/W safeguards the clock and RAM
data by power-fail detection and write protection.
Power-fail detection occurs when V
CCI
falls below
V
PFD
which is set by an internal bandgap refer-
ence. The M41T315Y/V/W constantly monitors
the V
CCI
supply pin. When V
CCI
is less than V
PFD
,
power-fail circuitry forces the chip enable output
(
CEO
) to V
CCI
or V
BAT
-0.2 volts for external RAM
write protection. During nominal supply conditions,
CEO
will track
CEI
with a propagation delay. Inter-
nally, the M41T315Y/V/W aborts any data transfer
in progress without changing any of the device
registers and prevents future access until V
CCI
exceeds V
PFD
.
Figure 7., page 6
illustrates a typi-
cal RAM/clock interface.
Figure 8. READ Mode Waveforms
Figure 9. WRITE Mode Waveforms
DATA OUTPUT VALID
WE
CEI
OE
Q
tCW
tCO
tRC
tOW
tCOE
tODO
tRR
tOD
tOE
tOEE
AI04259
DATA INPUT STABLE
OE
D
CEI
tWP
tWC
tCW
tDH
tWR
tWR
WE
t
DH
tDS
AI04261
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