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  • 參數(shù)資料
    型號(hào): M25P64-VME6TG
    廠商: 意法半導(dǎo)體
    元件分類: DRAM
    英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
    中文描述: 4兆位統(tǒng)一部門(mén),串行閃存
    文件頁(yè)數(shù): 22/38頁(yè)
    文件大小: 519K
    代理商: M25P64-VME6TG
    M25P64
    22/38
    Page Program (PP)
    The Page Program (PP) instruction allows bytes to
    be programmed in the memory (changing bits from
    1 to 0). Before it can be accepted, a Write Enable
    (WREN) instruction must previously have been ex-
    ecuted. After the Write Enable (WREN) instruction
    has been decoded, the device sets the Write En-
    able Latch (WEL).
    The Page Program (PP) instruction is entered by
    driving Chip Select (S) Low, followed by the in-
    struction code, three address bytes and at least
    one data byte on Serial Data Input (D). If the 8
    least significant address bits (A7-A0) are not all
    zero, all transmitted data that goes beyond the end
    of the current page are programmed from the start
    address of the same page (from the address
    whose 8 least significant bits (A7-A0) are all zero).
    Chip Select (S) must be driven Low for the entire
    duration of the sequence.
    The instruction sequence is shown in
    Figure 16.
    .
    If more than 256 bytes are sent to the device, pre-
    viously latched data are discarded and the last 256
    data bytes are guaranteed to be programmed cor-
    rectly within the same page. If less than 256 Data
    bytes are sent to device, they are correctly pro-
    grammed at the requested addresses without hav-
    ing any effects on the other bytes of the same
    page.
    Chip Select (S) must be driven High after the
    eighth bit of the last data byte has been latched in,
    otherwise the Page Program (PP) instruction is not
    executed.
    As soon as Chip Select (S) is driven High, the self-
    timed Page Program cycle (whose duration is t
    PP
    )
    is initiated. While the Page Program cycle is in
    progress, the Status Register may be read to
    check the value of the Write In Progress (WIP) bit.
    The Write In Progress (WIP) bit is 1 during the self-
    timed Page Program cycle, and is 0 when it is
    completed. At some unspecified time before the
    cycle is completed, the Write Enable Latch (WEL)
    bit is reset.
    A Page Program (PP) instruction applied to a page
    which is protected by the Block Protect (BP2, BP1,
    BP0) bits (see
    Table 2.
    and
    Table 3.
    ) is not execut-
    ed.
    Figure 16. Page Program (PP) Instruction Sequence
    C
    D
    AI04082B
    S
    42
    41
    43 44 45 46 47 48 49 50
    52 53 54 55
    40
    C
    D
    S
    23
    2
    1
    3
    4
    5
    6
    7
    8
    9 10
    28 29 30 31 32 33 34 35
    22 21
    3
    2
    1
    0
    36 37 38
    Instruction
    24-Bit Address
    0
    7
    6
    5
    4
    3
    2
    0
    1
    Data Byte 1
    39
    51
    7
    6
    5
    4
    3
    2
    0
    1
    Data Byte 2
    7
    6
    5
    4
    3
    2
    0
    1
    Data Byte 3
    Data Byte 256
    2
    2
    2
    2
    2
    2
    2
    7
    6
    5
    4
    3
    2
    0
    1
    2
    MSB
    MSB
    MSB
    MSB
    MSB
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